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Impact of line edge roughness on the resistivity of nanometer-scale interconnects

机译:线边缘粗糙度对纳米级互连电阻率的影响

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The impact of line edge roughness on the resistivity of copper interconnects in the sub-100 nm range has been calculated. An analytical model has been derived in order to describe the resistivity change. It has been found, that the resistivity is significantly increased compared to interconnect structures with smooth sidewalls for linewidths smaller than 50 nm and peak-to-peak variations of the widths exceeding 30 nm. As root causes of the increase geometrical effects combined with the size-dependent resistivity increase of nanometer-scale interconnects have been identified. Therefore, similar results are expected to apply for other metallization schemes, for example subtractively patterned aluminum.
机译:已经计算出线边缘粗糙度对低于100 nm范围内的铜互连电阻率的影响。为了描述电阻率变化,已经导出了一个分析模型。已经发现,与具有光滑侧壁的线宽小于50nm且宽度的峰-峰变化超过30nm的互连结构相比,电阻率显着增加。作为增加的几何原因的根本原因,已经确定了纳米级互连的尺寸依赖性电阻率增加。因此,预期类似的结果将适用于其他金属化方案,例如减法图案化的铝。

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