Stress induced defects and transistor leakage for shallow trench isolated SOI

摘要

Anomalous leakage currents are observed for shallow trench isolated SOI transistors. The leakage effect is caused by stress induced dislocations in the device silicon islands. These dislocations are observed using cross-sectional TEM analysis. For the shallow trench isolation process employed, the leakage is most pronounced on SIMOX wafers when the buried oxide thickness is scaled down to 100 nm. Limiting fabrication stresses to a minimum is critical for eliminating this leakage defect and in obtaining a robust, high yielding SOI STI process.