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Method and structure for relieving transistor performance degradation due to shallow trench isolation induced stress
Method and structure for relieving transistor performance degradation due to shallow trench isolation induced stress
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机译:缓解由于浅沟槽隔离引起的应力而导致的晶体管性能下降的方法和结构
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摘要
A method of forming shallow trench isolation (STI) regions for semiconductor devices, the method including defining STI trench openings within a semiconductor substrate; filling the STI trench openings with an initial trench fill material; defining a pattern of nano-scale openings over the substrate, at locations corresponding to the STI trench openings; transferring the pattern of nano-scale openings into the trench fill material so as to define a plurality of vertically oriented nano-scale openings in the trench fill material; and plugging upper portions of the nano-scale openings with additional trench fill material, thereby defining porous STI regions in the substrate.
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