首页> 外国专利> STACKED CHIP SEMICONDUCTOR PACKAGE USING A TSV STACKED ON A SUBSTRATE BY FLIP CHIP BONDING AND A WIRE

STACKED CHIP SEMICONDUCTOR PACKAGE USING A TSV STACKED ON A SUBSTRATE BY FLIP CHIP BONDING AND A WIRE

机译:使用通过倒装芯片键合和电线堆叠在基板上的TSV来堆叠芯片的半导体封装

摘要

PURPOSE: A stacked chip semiconductor package using a TSV(Through Silicon Via) is provided to reduce the number of through silicon vias and simultaneously reduce a space where the TSV is formed, thereby increasing the space usability rate of a chip.;CONSTITUTION: A lower chip module(20) is electrically connected to a substrate(10) by flip chip bonding. The lower chip module includes a plurality of chips(22) with a TSV(52). A sub chip module(30) is stacked on the lower chip module. An upper chip module is electrically connected to a substrate by a wire(16). A heat spreader contacting a thermal via is attached onto the upper chip module.;COPYRIGHT KIPO 2011
机译:目的:提供一种使用TSV(硅通孔)的堆叠芯片半导体封装,以减少硅通孔的数量,同时减少形成TSV的空间,从而提高芯片的空间利用率。下芯片模块(20)通过倒装芯片键合电连接到衬底(10)。下芯片模块包括具有TSV(52)的多个芯片(22)。子芯片模块(30)堆叠在下芯片模块上。上芯片模块通过导线(16)电连接到基板。接触散热孔的散热器连接到上部芯片模块上。; COPYRIGHT KIPO 2011

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