首页> 外国专利> Semiconductor multi-package module having package stacked over die-up flip chip ball grid array package and having wire bond interconnect between stacked packages

Semiconductor multi-package module having package stacked over die-up flip chip ball grid array package and having wire bond interconnect between stacked packages

机译:半导体多封装模块,其封装堆叠在裸片倒装芯片球栅阵列封装上方,并且在堆叠的封装之间具有引线键合互连

摘要

A semiconductor multi-package module having stacked second and first packages, each package including a die attached to a substrate, in which the first and second package substrates are interconnected by wire bonding, and in which the first package is a flip chip ball grid array package in a die-up configuration. Also, a method for making a semiconductor multi-package module, by providing a first package including a first package substrate and having a die-up flip chip configuration, affixing a second package including a second package substrate an upper surface of the first package, and forming z-interconnects between the first and second package substrates.
机译:一种具有堆叠的第二和第一封装的半导体多封装模块,每个封装包括附接到基板的管芯,其中第一和第二封装基板通过引线键合互连,并且其中第一封装是倒装芯片球栅阵列封装成裸片配置。另外,提供一种用于制造半导体多封装模块的方法,该方法通过提供包括第一封装基板并具有裸片倒装芯片配置的第一封装,将包括第二封装基板的第二封装固定在第一封装的上表面,在第一封装基板和第二封装基板之间形成z互连。

著录项

  • 公开/公告号US7732254B2

    专利类型

  • 公开/公告日2010-06-08

    原文格式PDF

  • 申请/专利权人 MARCOS KARNEZOS;

    申请/专利号US20070744182

  • 发明设计人 MARCOS KARNEZOS;

    申请日2007-05-03

  • 分类号H01L21/44;H01L23/02;

  • 国家 US

  • 入库时间 2022-08-21 18:48:25

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