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CHIP-ON WAFER BONDING METHOD AND BONDING DEVICE AND STRUCTURE INCLUDING CHIP AND WAFER

机译:芯片上晶圆键合方法以及包括芯片和晶圆的键合装置和结构

摘要

PROBLEM TO BE SOLVED: To provide a technique for enhancing mechanical strength by establishing electrical connection between a chip and a wafer or between a plurality of stacked chips, and for bonding a chip onto a wafer efficiently.;SOLUTION: The method for bonding a chip-on wafer includes: step S1 for performing surface activation at least of a metal area of a chip side bonding surface by colliding particles having a predetermined kinetic energy, and hydrophilizing by depositing water or an OH-containing material; step S2 for performing surface activation at the bonding part of a substrate by colliding particles having a predetermined kinetic energy, and hydrophilizing by depositing water or an OH-containing material; step S3 for attaching a plurality of chips subjected to surface activation and hydrophilization, respectively, onto the corresponding bonding parts of the substrate subjected to surface activation and hydrophilization so that the metal area of the chip comes into contact with the bonding part of the substrate; and step S4 for heating a structure including the substrate and the plurality of chips attached onto the substrate.;COPYRIGHT: (C)2014,JPO&INPIT
机译:解决的问题:提供一种通过在芯片和晶片之间或多个堆叠的芯片之间建立电连接来增强机械强度,并有效地将芯片粘结到晶片上的技术;解决方案:粘结芯片的方法-在晶片上包括:步骤S1,用于通过使具有预定动能的粒子碰撞,并通过沉积水或含OH的材料进行亲水化来对芯片侧键合表面的至少金属区域进行表面活化;以及步骤S2,用于通过使具有预定动能的粒子碰撞而在基板的接合部进行表面活化,并通过沉积水或含OH的材料使之亲水化。步骤S3,将经过表面活化和亲水化处理的多个芯片分别附着到经过表面活化和亲水化处理的衬底的相应结合部分上,以使芯片的金属区域与衬底的结合部分接触; ;步骤S4,用于加热包括衬底和附着到衬底上的多个芯片的结构。;版权所有:(C)2014,JPO&INPIT

著录项

  • 公开/公告号JP2013243333A

    专利类型

  • 公开/公告日2013-12-05

    原文格式PDF

  • 申请/专利权人 SUGA TADATOMO;BONDTECH INC;

    申请/专利号JP20120243900

  • 发明设计人 YAMAUCHI AKIRA;SUGA TADATOMO;

    申请日2012-11-05

  • 分类号H01L21/60;B23K20/00;B23K20/16;H01L25/18;H01L25/07;H01L25/065;

  • 国家 JP

  • 入库时间 2022-08-21 16:14:54

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