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A new analytical model for optimizing SOI LDMOS with step doped drift region

机译:利用阶跃掺杂漂移区优化SOI LDMOS的新分析模型

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摘要

In this paper, a new theoretical breakdown model of SOI RESURF LDMOS with step drift doping profile is proposed. According to this model, the 2-D electric field distributions of drift regions are investigated for both the incompletely and completely depleted cases. The doping profile and step number are optimized to improve the breakdown voltage and reduce fabrication cost. Finally, SOI LDMOS with various step numbers have been made using a 3 μm-thick top silicon layer and a 1.5 μm-thick buried oxide layer. The experiment results indicate that two-step drift doping can enable increase in the breakdown voltage by as much as 40% and decrease in the on-resistance by as much as 16% in comparison to the conventional LDMOS with uniformly doped drift region.
机译:本文提出了一种新的具有逐步漂移掺杂分布的SOI RESURF LDMOS理论击穿模型。根据该模型,研究了不完全和完全耗尽情况下漂移区的二维电场分布。掺杂分布和步数被优化以提高击穿电压并降低制造成本。最终,使用3μm厚的顶部硅层和1.5μm厚的掩埋氧化物层制作了具有各种阶数的SOI LDMOS。实验结果表明,与具有均匀掺杂漂移区的常规LDMOS相比,两步漂移掺杂可使击穿电压增加多达40%,导通电阻减小多达16%。

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