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Design, Simulation, and Fabrication of 4H-SiC Power SBDs With SIPOS FP Structure

机译:SIPOS FP结构的4H-SiC功率SBD的设计,仿真与制作

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摘要

We introduce a field plate (FP) termination structure utilizing semi-insulating polycrystalline silicon (SIPOS) as the dielectrics in 4H-SiC Schottky barrier diodes (SBDs) in order to relieve the electric field enhancement at the junction corners and enhance the breakdown voltage of devices. In SIPOS FP structures, the maximum electric field within the dielectrics can be significantly reduced in reverse blocking states due to the SIPOS with a higher dielectric constant . Simulation and fabrication of 4H-SiC SBDs with the novel and traditional SiO FP were carried out. The simulations were performed using the commercial 2-D device simulator DESSIS. Compared with a traditional SiO FP structure device, the optimal design of the new type of SIPOS FP structure will lead to an increase of 780 V in the breakdown voltage and a 44.8% reduction. From the experimental results, it has been proven that the new type of SIPOS FP structure indeed relieves the maximum electric field in the dielectric layer while simultaneously realizes an enhanced device breakdown voltage as high as 1630 V, which is about 74.5% of the ideal theoretical breakdown voltage.
机译:我们介绍了一种场板(FP)端接结构,该器件采用半绝缘多晶硅(SIPOS)作为4H-SiC肖特基势垒二极管(SBD)中的电介质,以减轻结点处的电场增强并提高击穿电压设备。在SIPOS FP结构中,由于SIPOS具有较高的介电常数,因此在反向阻挡状态下,电介质内的最大电场可以显着降低。用新型和传统的SiO FP对4H-SiC SBD进行了模拟和制造。使用商用二维设备模拟器DESSIS进行了仿真。与传统的SiO FP结构器件相比,新型SIPOS FP结构的优化设计将使击穿电压提高780 V,降低44.8%。从实验结果可以证明,新型的SIPOS FP结构确实可以缓解介电层中的最大电场,同时实现高达1630 V的增强的器件击穿电压,约为理想理论值的74.5%。击穿电压。

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