Growth and Characterization of Thick 4H-SiC Epilayers for Very High Voltage Bipolar Devices

摘要

To establish elemental technologies of thick 4H-SiC epitaxial growth for very high voltage bipolar devices, reduction methods for Z_(1/2) center, BPDs and in-grown stacking faults have been investigated. Complete elimination of the Z_(1/2) center in a very thick (>100 μm) epilayer and significant enhancement of carrier lifetimes are achieved by growing the epilayer under proper conditions followed by application of the post-growth process. A new method to convert remaining BPDs in an epilayer to TEDs by simple high temperature annealing is demonstrated. We also discuss the growth conditions to minimize the formation of the ingrown stacking faults during epitaxial growth under a H_2+SiH_4+C_3H_8 system.