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Identification of Yield-Limiting Defects in a 0.5 Micron, Shallow Trench Isolation Technology

机译:鉴定0.5微米,浅沟槽隔离技术的产量限制缺陷

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During the development and qualification of a radiation-hardened, 0.5 μm shallow trench isolation technology, several yield-limiting defects were observed. The 256K (32K x 8) static-random access memories (SRAMs) used as a technology characterization vehicle had elevated power supply current during wafer probe testing. Many of the die sites were functional, but exhibited quiescent power supply current( I_(DDQ)) in excess of 100 μA, the present limit for this particular SRAM. Initial electrical analysis indicated that many of the die sites exhibited unstable I_(DDQ) that fluctuated rapidly. We refer to this condition as "jitter." The IDDQ jitter appeared to be independent of temperature and predominately associated with the larger 256K SRAMs and not as prevalent in the 16K SRAMs (on the same reticle set). The root cause of failure was found to be two major processing problems: salicide bridging and stress-induced dislocations in the silicon islands.
机译:在辐射硬化的开发和资格期间,0.5μm浅沟槽隔离技术,观察到几种产量限制缺陷。用作技术表征车辆的256K(32K X 8)静态随机接入存储器(SRAM)在晶片探测器测试期间具有升高的电源电流。许多模具部位是功能性的,但表现出超过100μA的静态电源电流(I_(DDQ)),该特定SRAM的本限值。初始电气分析表明,许多管芯部位表现出快速波动的不稳定I_(DDQ)。我们将这种情况称为“抖动”。 IDDQ抖动似乎与温度无关,主要与较大的256K SRAM相关联,而不是在16K SRAM(在同一掩模版组上)中的普遍存在。发现失败的根本原因是两个主要的处理问题:硅岛的Palicide桥接和应激诱导的脱位。

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