High Voltage InGaN/GaN/AlGaN RTD Suitable for ESD Protection Applications of GaN/InGaN-based Devices and ICs Validated by Simulation Results

摘要

A novel high voltage InGaN/GaN/AlGaN RTD was proposed for ESD protection of GaN/InGaN-based devices and ICs. The proposed RTD consists of a sandwiched Inn_0.21nGan_0.79nN/GaN/Inn_0.14nGan_0.86nN/Aln_0.1nGan_0.9nN DBS structure on a GaN/InGaN substrate with N-original surface. Simulation experiments indicated that the proposed RTD samples are characterized of high forward block voltages at about 7.38 V, low leakage forward currents less than 10n^-38nA/μmn²nand 10n^-39nA/μmn²nand high reverse current densities up to the order of 10n^-5nA/μmn²nat about -2.55 V bias voltage and beyond 10n^-4nA/μmn²nat about -2.8 V bias voltage respectively. Analysis on HBM mode ESD circuits indicated that they can be simplified into ideal one order RC loop. This is because that the resistance of the proposed high voltage (HV) RTD pair at on-state is ignorable relative to discharging resistance R1 whether considering its parasitic capacitance or not. As a result, the sample 1 with junction area of 120×120μmn²nis large enough to protect the chip from ESD damaging up to ±2000 V ESV swash in ideal 840 ns. As for sample 2, its junction area of 380×380μmn²nis capable of providing the same strength of ESD protection as that of sample 1. As the parasitic capacitance of sample 2 was considered through analyses of charge variations in emitter region, quantum well region and collector region with bias voltage, the results indicate that the big signal differential parasitic floating capacitance of quantum region is about -0.178/-0.174 pF/cmn²n, which is negligible comparing with stand ESV capacitance of HBM mode ESD protection applications. Its function is to shielding the influence of applied voltage on the potential of the quantum well. Its attenuation factor of voltage is not more than -23.6 dB.