The present disclosure relates to an inter-digital capacitor which can be formed together with split-gate flash memory cells and which provides a high capacitance per unit area, and a manufacturing method. In some embodiments, the interdigital capacitor has a well region located within an upper surface of a semiconductor substrate. Multiple trenches extend vertically from the top surface of the semiconductor substrate to positions within the well zone. Within the multiple trenches lower electrodes are arranged. The bottom electrodes are separated from the well zone by a charge trapping dielectric layer disposed along interior surfaces of the plurality of trenches. A plurality of top electrodes are disposed over the semiconductor substrate at locations laterally separated from the bottom electrodes by the charge trapping dielectric layer and vertically separated from the well zone by a first dielectric layer.
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