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IGBT power transistor, producible in trench-isolated SOI technology and method of making same

机译:可在沟槽隔离的SOI技术中生产的IGBT功率晶体管及其制造方法

摘要

IGBT power transistor for a high voltage, producible in a trench-isolated SOI technology, in a defined area of an active layer (3) of the SOI disk located on the SOI support disk (1), which is buried in the vertical direction horizontal oxide layer (2) of the SOI disc and in the lateral direction by the circumferential vertical isolation trench (4) is electrically insulated and in the interior of a vertical highly doped layer (5) and a horizontal buried highly doped layer (6), both with the same charge carrier type the IGBT provided with one or more emitter cells (11), each consisting of an IGBT well region (7) with a doping of the opposite charge carrier type as the active layer (3), an emitter region ( 9) with the same charge carrier type as the active layer (3), a gate electrode (10) and a metallization of the emitter and Bodyanschl - wherein in the collector region a field oxide (20) is separated from the one or more emitter cells (11), a well region (28) with a charge carrier type of the active layer (3) is present, wherein the well region (28) is adjacent to the highly doped vertical layer (5) and terminates below the field oxide (20); and there is a highly doped collector region (22) having a charge carrier type opposite the active layer (3), a heavily doped junction region adjacent thereto in the direction of isolation trench (4) (26) of the same charge carrier type as the active layer (3) and adjacent thereto a heavily doped region (24) having a charge carrier type opposite the active layer (3) which projects into the vertical heavily doped layer (5); Layer (32); - wherein first contact holes (30) lying over the highly doped collector region (22) and second contact holes (40), proportionately above the heavily doped And a collector terminal (12) is high-resistance electrically short-circuited to the vertical highly doped layer (5) by means of a contact metallization (60), - wherein a resistance of the short circuit is determined by the doping concentration of the well region (28) and the lateral extension of the heavily doped region (24) from the field oxide (20) toward the isolation trench (4), and the through loss or the switching loss of an IGBT respectively by size and number of first and second contact holes ( 30; 40) as well as the distances in each case one row of the contact holes (30; 40) is adjustable.
机译:在沟槽绝缘SOI技术中可产生的高压IGBT功率晶体管,位于SOI支撑盘(1)上的SOI盘的有源层(3)的定义区域中,该区域垂直埋置在水平方向上SOI磁盘的氧化层(2)以及在横向方向上由周向垂直隔离沟槽(4)进行电绝缘,并在垂直高掺杂层(5)和水平掩埋高掺杂层(6)的内部,两者均具有相同的载流子类型,IGBT设有一个或多个发射极单元(11),每个发射极单元由一个IGBT阱区(7)和一个与有源层(3)相反的载流子类型的掺杂组成(9)具有与有源层(3)相同的电荷载流子类型,栅电极(10)以及发射极和Bodyanschl的金属化层-其中在集电极区域中,场氧化物(20)与一个或多个分隔开发射极单元(11),具有电荷载流子类型的阱区(28)存在有源层(3)的一部分,其中阱区(28)与高掺杂垂直层(5)相邻并终止于场氧化物(20)下方;并且存在与有源层(3)相对的,具有电荷载流子类型的高掺杂集电极区域(22),在隔离沟槽(4)(26)的方向上与有源层(3)相邻的重掺杂结区域与该有源载流子类型相同。有源层(3)并与其相邻的重掺杂区(24)具有与有源层(3)相对的电荷载流子类型,该重载区域(24)伸入垂直的重掺杂层(5)中;层(32); -其中,在高掺杂集电极区域(22)上的第一接触孔(30)和在重掺杂集电极上方的第二接触孔(40)成比例地分布,并且将集电极端子(12)高电阻电短路到垂直高度借助接触金属化层(60)形成掺杂层(5),其中短路电阻取决于阱区(28)的掺杂浓度和重掺杂区(24)从阱区的横向延伸。场氧化物(20)朝向隔离沟槽(4),以及IGBT的直通损耗或开关损耗,分别取决于第一和第二接触孔(30; 40)的大小和数量以及每行的距离接触孔(30; 40)的角度可调节。

著录项

  • 公开/公告号DE102013009985B4

    专利类型

  • 公开/公告日2019-06-13

    原文格式PDF

  • 申请/专利权人 X-FAB SEMICONDUCTOR FOUNDRIES AG;

    申请/专利号DE102013009985

  • 发明设计人 RALF LERNER;SIEGFRIED HERING;

    申请日2013-06-14

  • 分类号H01L29/739;H01L21/331;

  • 国家 DE

  • 入库时间 2022-08-21 11:45:46

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