首页> 外文期刊>European Semiconductor >Copper damascene electroplating for efficient CMP
【24h】

Copper damascene electroplating for efficient CMP

机译:铜镶嵌电镀可实现高效CMP

获取原文
获取原文并翻译 | 示例
           

摘要

During damascene interconnect formation, copper is electrodeposited as a continuous film across the seeded dielectric surface of wafers imaged with recessed patterns that define the chip interconnect circuitry. In the next process step, chemical mechanical planarisadon (CMP) is used to remove all metal from the wafer surface leaving the desired Cu circuitry in the recessed dielectric images. To most easily achieve rapid removal of copper and uniform definition of the Cu circuitry, the plated deposit should have a planar surface rather than a topography that depends on the underlying image in the dielectric. In practice, however, the plated copper film is typically recessed over large pads by an amount equivalent to the dielectric thickness, and is relatively thick relative to the field over dense arrays of trenches (Figure 1).
机译:在镶嵌互连的形成过程中,铜以连续膜的形式连续沉积在晶圆的籽晶介电表面上,形成连续的薄膜,该晶圆以定义芯片互连电路的凹陷图案成像。在下一个处理步骤中,将使用化学机械平面退火(CMP)从晶圆表面去除所有金属,从而在凹陷的介电图像中留下所需的Cu电路。为了最轻松地快速去除铜并均匀定义Cu电路,镀层应具有平坦的表面,而不是取决于电介质中基础图像的形貌。然而,实际上,镀铜膜通常在大焊盘上凹陷等于介电厚度的量,并且相对于密集的沟槽阵列上的电场而言相对较厚(图1)。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号