To maintain current planarization levels when copper systems come on-line, slurry and cleaning chemistries may need to be modified. The National Technology Roadmap for Semiconductors developed by the Semiconductor Industry Association projects that there will be seven or eight metal levels on ULSI logic devices by 2006, along with metal insulator dielectric constants of 1.5 to 2.0. Copper is rapidly becoming the metallization material of choice to meet the evolving SIA requirements for metal line density, with IBM, TI, and Motorola taking the lead and initiating major copper programs. Copper's appeal includes its low resistivity (～1.7 μΩ-cm for bulk copper), which can help improve device performance though greater speed and smaller resistance capacitance time constants; high current density; and good resistance to electromigration. In addition, it can be deposited by a variety of techniques—physical and chemical vapor deposition as well as electroless and electrolytic plating—each with different grain sizes and fill characteristics.
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