首页> 外文期刊>IEEE Transactions on Electron Devices >Numerical small-signal AC modeling of deep-level-trap related frequency-dependent output conductance and capacitance for GaAs MESFET's on semi-insulating substrates
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Numerical small-signal AC modeling of deep-level-trap related frequency-dependent output conductance and capacitance for GaAs MESFET's on semi-insulating substrates

机译:半绝缘衬底上GaAs MESFET的深层陷阱相关频率相关的输出电导和电容的数字小信号AC建模

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摘要

A two-dimensional numerical deep-level-trap (DLT) model suitable for small-signal AC analysis is described. The model reproduces the experimentally observed frequency-dependent output conductance for a GaAs MESFET on a semi-insulating substrate, clarifies the relations between the frequency characteristics and trap parameters, and identifies two trap levels with proper energy separation supported by DLTS measurement. The model also predicts some frequency-dependent output capacitance contributed by the two trap levels.
机译:描述了适用于小信号交流分析的二维数值深层陷阱(DLT)模型。该模型在半绝缘衬底上再现了实验观察到的GaAs MESFET随频率变化的输出电导,澄清了频率特性与陷阱参数之间的关系,并通过DLTS测量支持了具有适当能量分离的两个陷阱能级。该模型还预测了由两个陷波级引起的某些频率相关的输出电容。

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