Numerical analysis of GaAs MESFETs with p-buffer layer on semi-insulating substrate including deep traps

摘要

Numerical analysis of GaAs MESFETs with a p-buffer layer on the semi-insulating substrate is presented in which impurity compensation by traps is included. Using a p-buffer layer is shown to be effective in minimising the short-channel effects as in the case of using a substrate with high density of traps.