Circuit reliability simulator for interconnect, via, and contact electromigration

摘要

A model for predicting Al interconnect and intermetallic contact/via electromigration time-to-failure under arbitrary current waveform is incorporated in a circuit electromigration reliability simulator. The simulator can (1) generate layout advisory for width and length of each interconnect, and the number of contacts and vias at each node in a circuit, and (2) estimate the overall circuit electromigration failure rate and/or cumulative percent failure as functions of time, temperature, voltage, frequency, and previous stress (e.g., burn-in).