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Comparison of Methods for Accurate Characterization of Interface Traps in GaN MOS-HFET Devices

机译:GaN MOS-HFET器件中界面陷阱的准确表征方法的比较

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摘要

Reliability of dielectrics is a critical concern in GaN metal-oxide-semiconductor-heterojunction-field-effect transistor (MOS-HFET) devices for use in high-voltage power and RF applications. Accurate characterization of interface traps is essential toward developing an understanding of the reliability issues associated with this system and to evaluate the effectiveness of different dielectrics proposed for use in the gate-stack or the passivation of the access regions. Using small-signal equivalent circuit models and TCAD simulations, it is found that conductance and capacitance methods for trap density estimation potentially have severely constrained detection limits and can probe only shallow traps. In contrast, a pulsed-IV method, used along with UV irradiation, can accurately detect a wide range of trap densities over the entire wide bandgap. The effectiveness of this method is also experimentally demonstrated using an AlGaN/GaN MOS-HFET device with HfAlO gate dielectric.
机译:在用于高压电源和RF应用的GaN金属氧化物半导体异质结场效应晶体管(MOS-HFET)器件中,电介质的可靠性是至关重要的问题。界面陷阱的准确表征对于增进对与此系统相关的可靠性问题的理解以及评估提议用于栅堆叠或访问区钝化的不同电介质的有效性至关重要。使用小信号等效电路模型和TCAD仿真,发现用于陷阱密度估计的电导和电容方法可能会严重限制检测极限,并且只能探测浅陷阱。相比之下,脉冲IV方法与UV辐射一起使用,可以在整个宽带隙中准确检测宽范围的陷阱密度。使用具有HfAlO栅极电介质的AlGaN / GaN MOS-HFET器件,还通过实验证明了该方法的有效性。

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