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Nonvolatile Charge-Trap Memory Transistors With Top-Gate Structure Using In–Ga–Zn-O Active Channel and ZnO Charge-Trap Layer

机译:具有顶部门结构的In-Ga-Zn-O有源沟道和ZnO电荷陷阱层的非易失性电荷陷阱存储器晶体管

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摘要

We proposed a charge-trap-type memory transistor with a top-gate structure composed of ${rm Al}_{2}{rm O}_{3}$ blocking/ZnO charge-trap/IGZO active/${rm Al}_{2}{rm O}_{3}$ tunneling layer. The memory ON/OFF ratio higher than six-orders-of magnitude was obtained after the programming when the width and amplitude of program pulses were 100 ms and ${pm}{rm 20}~{rm V}$, respectively. Excellent endurance was successfully confirmed under the repetitive programming with $10^{4}~{rm cycles}$. The memory ON/OFF ratio higher than $10^{3}$ was guaranteed even after the lapse of $10^{4}~{rm s}$. Interestingly, the retention properties were affected by the bias conditions for read-out operations.
机译:我们提出了一种电荷陷阱型存储晶体管,该晶体管具有由{{rm Al} _ {2} {rm O} _ {3} $阻挡/ ZnO电荷陷阱/ IGZO有源/ $ {rm Al } _ {2} {rm O} _ {3} $隧道层。当编程脉冲的宽度和幅度分别为100 ms和$ {pm} {rm 20}〜{rm V} $时,在编程后获得了高于6个数量级的存储器开/关比。在$ 10 ^ {4}〜{rm cycle} $的重复编程下,已成功确认了出色的耐力。即使经过$ 10 ^ {4}〜{rm s} $,也可以确保高于$ 10 ^ {3} $的内存开/关比。有趣的是,保留性能受读出操作的偏压条件影响。

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