Electrically erasable programmable read only memory cell structure for smart card, has memory transistor with gate having dielectric layer defining adjacent channel region with thickness greater than tunnel region thickness

摘要

The structure has a floating junction (244) between a memory transistor (240) and a selection transistor (242) formed on a semi-conductor substrate (201). A dielectric layer of a gate (256) in the transistor (240) defining an adjacent channel region (204b) has a thickness greater than the thickness of a tunnel region (204a). A separate channel region is located near the channel region opposite to the tunnel region. An independent claim is also included for a method of producing an electrically erasable programmable read only memory cell structure (EEPROM).