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Wafer-Level Packaging Design With Through Substrate Grooves as Interconnection for GaAs-Based Image Sensor

机译:晶圆级封装设计,以贯穿衬底的凹槽作为互连,用于基于GaAs的图像传感器

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摘要

A wafer-level packaging design for GaAs-based image sensor is presented. Key processes, such as GaAs/glass wafer bonding, GaAs substrate thinning, through substrate grooves (TSGs) fabrication, redistribution layer formation, polymer passivation, and laser jet bumping, are examined and characterized. GaAs image sensor package with 64 leads is successfully fabricated on 4-in thinned GaAs/glass test vehicle wafer. In the package, two long TSGs are wet etched as the interconnection path. Process parameters are systematically studied and given. Then, fabrication results of these processes were discussed. Finally, electrical tests show that ohmic contact is obtained with a resistance of around 30 $Omega$ between two nearby interconnections.
机译:提出了基于GaAs的图像传感器的晶圆级封装设计。对关键工艺(例如,GaAs /玻璃晶圆键合,GaAs衬底减薄,通过衬底凹槽(TSG)的制造,重新分布层的形成,聚合物钝化和激光喷射凸点)进行了测试和表征。具有64引线的GaAs图像传感器封装已成功地制造在4英寸变薄的GaAs /玻璃测试载具晶片上。在封装中,两个长TSG被湿法刻蚀作为互连路径。系统地研究和给出了工艺参数。然后,讨论了这些工艺的制造结果。最后,电气测试表明,在两个附近的互连之间获得的欧姆接触的电阻约为30Ω。

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