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Design, fabrication and testing of conformal, localized wafer-level packaging for RF MEMS devices.

机译:设计,制造和测试用于RF MEMS器件的保形,局部晶圆级封装。

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摘要

A low-cost, low-temperature packaging concept is proposed for localized sealing and control of the ambient of a device cavity appropriate for Radio-Frequency (RF) Micro-Electro-Mechanical (MEMS) devices, such as resonators and switches. These devices require application specific packaging to facilitate their integration, provide protection from the environment, and control interactions with other circuitry. In order to integrate these devices into standard integrated circuit (IC) process flows and minimize damage due to post-fabrication steps, packaging is performed at the wafer level.; In this work Indium and Silver are used to seal a monolithic localized hermetic package. The cavity protecting the device is formed using standard lithography-based processing techniques. Metal walls are built up from the substrate and encapsulated by a glass or silicon lid to create a monolithic micro-hermetic package surrounding a predefined RF microsystem. The bond for the seal is then formed by rapid alloying of Indium and Silver using a temperature greater than that of the melting point of Indium. This ensures that the seal formed can subsequently function at temperatures higher than the melting temperature of pure Indium. This method offers a low-temperature bonding technique with thermal robustness suitable for wafer-level process integration. The ultimate goal is to create a seal in a vacuum environment.; In this dissertation, design trade-offs made in wafer-level packaging are explained using thermo-mechanical stress and electrical performance simulations. Prototype passive microwave circuits are packaged using the developed packaging process and the performance of the fabricated circuits before and after packaging is analyzed. The effect of the package on coplanar waveguide structures are characterized by measuring scattering parameters and models are developed as a design tool for wafer-level package integration. The small scale of the localized package is expected to provide greater reliability over conventional full chip packages.
机译:提出了一种低成本,低温包装的概念,用于局部密封和控制适用于射频(RF)微机电(MEMS)器件(例如谐振器和开关)的器件腔的周围环境。这些设备需要专用包装来促进它们的集成,提供对环境的保护以及控制与其他电路的交互。为了将这些器件集成到标准集成电路(IC)工艺流程中,并最大程度地减少由于后制造步骤造成的损坏,应在晶圆级进行封装。在这项工作中,铟和银用于密封整体式局部密封包装。使用标准的基于光刻的加工技术形成保护器件的空腔。金属壁是由基板构成的,并由玻璃或硅盖密封,以围绕预定的RF微系统创建单片微密封封装。然后,通过使用高于铟熔点的温度的铟和银的快速合金化来形成用于密封的结合。这确保了所形成的密封件随后可以在高于纯铟的熔化温度的温度下起作用。这种方法提供了一种具有热稳定性的低温键合技术,适用于晶圆级工艺集成。最终目标是在真空环境中密封。本文利用热机械应力和电性能仿真来解释晶圆级封装的设计折衷。使用开发的封装工艺来封装原型无源微波电路,并分析封装前后所制造电路的性能。通过测量散射参数来表征封装对共面波导结构的影响,并开发了模型作为晶片级封装集成的设计工具。与传统的全芯片封装相比,小尺寸的局部封装有望提供更高的可靠性。

著录项

  • 作者

    Collins, Gustina B.;

  • 作者单位

    Virginia Polytechnic Institute and State University.;

  • 授予单位 Virginia Polytechnic Institute and State University.;
  • 学科 Engineering Electronics and Electrical.
  • 学位 Ph.D.
  • 年度 2006
  • 页码 209 p.
  • 总页数 209
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
  • 关键词

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