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Interface Trap Densities and Admittance Characteristics of III-V MOS capacitors

机译:III-V MOS电容器的接口阱密度和导纳特性

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High-k/III-V interfaces in metal-oxide-semiconductor capacitor structures with In_(0.53)Ga_(0.47)As channels exhibit certain admittance characteristics that are almost universally observed, independent of the specific high-k material or deposition technique used. These include a "hump" in the capacitance-voltage curves at negative biases (depletion region) and low frequencies for n-type channels, and pronounced frequency dispersion in accumulation. The paper discusses both features in the context of the high density of non-uniformly distributed interface trap states in the semiconductor band gap that is typical of these interfaces.
机译:具有IN_(0.53)GA_(0.47)的金属氧化物半导体电容器结构中的高K / III-V接口作为通道表现出几乎普遍观察的一定导入特性,与所使用的特定高k材料或沉积技术无关。这些包括在负偏置(耗尽区域)处的电容电压曲线中的“驼峰”和N型通道的低频,并在累积中发音频率分散。本文在半导体带隙中的典型中的非均匀分布界面陷阱状态的高密度的上下文中讨论了这两个特征。

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