Low-Voltage Scaled 6T FinFET SRAM Cells

摘要

We have demonstrated scaled FinFET ring oscillators with Wfin=20 nm and SRAM cells with L_G scaled down to 30 nm and W_(FIN)=10 nm. The cells show excellent V_(DD) scalability down to 0.6 V with a high static noise margin of 185 mV. The high cell stability can be achieved by choosing the correct gate stack. Assessment of the device and SRAM variability shows a much reduced aSNM at lower V_(DD). The latter demonstrates that FinFET-based cells are excellent candidates for sub-32 nm low-voltage design.