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Interface oxide trap characterisation in germanium-on-insulator 0.12 μm PMOS transistors by drain current noise measurements

机译:通过漏极电流噪声测量界面在绝缘体上的界面氧化物阱表征0.12μmPMOS晶体管

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This paper presents an experimental analysis of the noise measurements performed in germanium on insulator (GeOI) 0.12 μm PMOS transistors. The front gate stack is composed of a SiO_2/HfO_2 material with a TiN metal gate electrode. The result is an aggressively reduced equivalent oxide thickness (EOT) of 1.8 nm. The buried oxide is used as a back gate for experimental purposes. Front gate and back gate oxides/Ge interfaces are characterized. The slow oxide trap densities of the two interfaces are extracted. The values obtained for the front gate oxide are N_t(E_(Fn)) = 1.2×10~(18) cm~(-3) eV~(-1) and are comparable to values for nitrided oxides on Si bulk. The extracted values for slow oxide trap densities of the SiO_2Ge interface are between 6 and 8×10~(17) cm~(-3) eV~(-1) and are close to those of state of art buried oxide SiO_2/Si interfaces. These results are of importance for the future development of GeOI technologies.
机译:本文介绍了在绝缘体(GeoI)0.12μmPMOS晶体管上的锗中进行的噪声测量的实验分析。前门堆叠由具有锡金属栅电极的SiO_2 / HFO_2材料组成。结果是1.8nm的积极降低的​​等效氧化物厚度(EOT)。掩埋氧化物用作实验目的的后栅极。前门和背栅极氧化物/ GE接口的特征在于。提取两个接口的慢氧捕集性密度。用于前栅极氧化物获得的值是N_T(E_(FN))= 1.2×10〜(18)cm〜(-3)EV〜(-1),并且与Si块体上的氮化氧化物的值相当。 SiO_2GE界面的慢氧化物阱密度的提取值在6到8×10〜(17)cm〜(-3)eV〜(-1)之间,并且接近诸如掩埋氧化物SiO_2 / Si接口的现有状态。这些结果对于Geoi Technologies的未来发展是重要的。

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