首页> 外文会议>Microsystems,Packaging,Assembly Circuits Technology Conference,(IMPACT),2008 3rd International >Effect of Underfill Mechanical Property on Cu/Low-K Delamination for Lead-Free Flip Chip Packaging
【24h】

Effect of Underfill Mechanical Property on Cu/Low-K Delamination for Lead-Free Flip Chip Packaging

机译:底部填充机械性能对无铅倒装芯片封装的Cu /低K分层的影响

获取原文

摘要

The low dielectric constant (low-K) material and copper (Cu) interconnection in chip enhance the electrical speed for microelectronic devices. The low-K materials generally show low mechanical strength, high coefficient of thermal expansion (CTE) and poor adhesion. Cu/low-K delamination becomes a failure cause during reliability test. Many papers have studied this failure and demonstrated the underfill selection method for preventing the delamination from die corner. This work demonstrates a different low-K failure mode. The delamination was initialed at die inside and propagated to the die corner, which was observed in the lead free flip-chip package after the temperature cycling test (TCT). Simulation was employed to study the possibility of this failure mechanism and provide the underfill selection strategy for this failure. An underfill evaluation experiment confirms the simulation result, eventually.
机译:芯片中的低介电常数(low-K)材料和铜(Cu)互连提高了微电子设备的电气速度。低K材料通常显示出较低的机械强度,高的热膨胀系数(CTE)和较差的附着力。在可靠性测试期间,Cu /低K分层会成为故障原因。许多论文已经研究了这种失效,并演示了防止底部死角脱层的底部填充选择方法。这项工作演示了一种不同的低K故障模式。在温度循环测试(TCT)之后,在无铅倒装芯片封装中观察到了分层现象,该分层现象是在芯片内部开始并传播到芯片角部的。通过仿真研究了这种失效机理的可能性,并提供了针对该失效的底部填充选择策略。底部填充评估实验最终确认了模拟结果。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号