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HARM Processing Techniques for MEMS and MOEMS Devices using Bonded SOI Substrates and DRIE

机译:使用键合SOI基板和DRIE的MEMS和MOEMS器件的HARM处理技术

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Silicon-on-Insulator (SOI) MEMS devies (1) are rapidly gaining popularity in realising numerious solutions for MEMS, especially in the optical and inertia application fields. BCOrecently developed a DRIE trench etch, utilising the Bosch process, and refill process for high voltage dielectric iselectric isolation integrated circuits on thick SOI substrates (2,3,4). In this paper we present our ost recently developed DRIE processes for MEMS and MOEMS devices. These advanced etch techniques are initially described and their integration with silicon bonding demonstrated. This has enabled process flows that are currently being utilised to develop optical router and filter products for fibre optics telecommunications and high precision accelerometers.
机译:绝缘体上硅(SOI)MEMS器件(1)在实现MEMS的众多解决方案(尤其是在光学和惯性应用领域中)方面迅速得到普及。 BCO最近利用博世(Bosch)工艺和再填充工艺开发了DRIE沟槽蚀刻技术,用于在厚SOI衬底上进行高压电介质等电隔离集成电路(2,3,4)。在本文中,我们介绍了我们最近开发的用于MEMS和MOEMS器件的DRIE工艺。首先介绍了这些先进的蚀刻技术,并展示了它们与硅键合的集成。这使得当前可以用于开发用于光纤电信和高精度加速度计的光路由器和滤波器产品的工艺流程成为可能。

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