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Dopant Segregated Schottky S/D and Application to High Performance MOSFETs

机译:掺杂剂隔离肖特基S / D和应用于高性能MOSFET

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Schottky barrier MOSFETs (SBTs) have attracted much attention as a candidate for achieving high-performance MOSFETs in future ULSIs [1-5]. Their potential advantages are low SD resistance, short channel effect immunity and high carrier injection velocity [6], and many more. The major obstacle is however, to reduce the Schottky barrier height (Φ_b) in these devices (both n- and pMOSFETs) since large Φ_b, severely limits the current drivability.
机译:肖特基屏障MOSFET(SBT)吸引了许多关注,作为在未来ULSIS中实现高性能MOSFET的候选人[1-5]。它们的潜在优点是低SD电阻,短沟道效应免疫和高载流程注射速度[6]等等。然而,主要障碍物是在这些装置(N和PMOSFET)中减少肖特基势垒高度(φ_B)由于大φ_B,严重限制了电流的驱动性。

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