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Integrated circuit packaging system with wafer level reconfiguration and method of manufacture thereof

机译:具有晶圆级重构的集成电路封装系统及其制造方法

摘要

A method of manufacture of an integrated circuit packaging system includes: removing a portion of a leadframe to form a partially removed region and an upper portion of a peripheral lead on the leadframe first side; mounting a first integrated circuit over the partially removed region with a first adhesive; forming a first molding layer directly on the first integrated circuit and the peripheral lead; removing a portion of a leadframe second side exposing the first adhesive; mounting a second integrated circuit on the first adhesive of the first integrated circuit; forming a first interconnection layer directly on the first integrated circuit with the first integrated circuit and the peripheral lead electrically connected; and forming a second interconnection layer directly on the second integrated circuit with the second integrated circuit and the peripheral lead electrically connected.
机译:一种集成电路封装系统的制造方法,包括:去除引线框的一部分以在引线框第一侧上形成部分去除的区域和外围引线的上部;以及用第一粘合剂将第一集成电路安装在部分去除的区域上;直接在第一集成电路和外围引线上形成第一成型层;去除引线框架第二侧的暴露第一粘合剂的一部分;将第二集成电路安装在第一集成电路的第一粘合剂上;在第一集成电路和外围引线电连接的情况下,直接在第一集成电路上形成第一互连层;在第二集成电路和外围引线电连接的情况下,在第二集成电路上直接形成第二互连层。

著录项

  • 公开/公告号US9324673B2

    专利类型

  • 公开/公告日2016-04-26

    原文格式PDF

  • 申请/专利权人 ZIGMUND RAMIREZ CAMACHO;

    申请/专利号US201113167649

  • 发明设计人 ZIGMUND RAMIREZ CAMACHO;

    申请日2011-06-23

  • 分类号H01L23/495;H01L23/00;H01L25/065;H01L23/538;H01L25/03;H01L25/00;H01L23/498;H01L21/48;

  • 国家 US

  • 入库时间 2022-08-21 14:30:21

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