The invention relates to a method of manufacturing an integrated circuit (1), comprising the steps of: -providing a substrate (100), the substrate being provided with first and second dummy grids and an encapsulation layer (106); ); removing the first and second dummy gates to provide first and second grooves (23,33) in said encapsulation layer (106); simultaneously depositing a layer of gate insulator (107) at least in the bottom of the first groove and on a side wall of the second groove; -forming a gate electrode of said transistor (2) in the first groove, forming source and drain electrodes of said transistor on either side of said gate electrode, forming first and second electrodes of said memory cell from and other of said gate insulator layer deposited on a side wall of the second groove.
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