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Journal of Low Power Electronics

中文名称：低功率电子学报

ISSN：1546-1998
出版周期：3 times a year

发文量：540

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1.Device Physics of Germanium-Junctionless Tunnel Field Effect Transistor and an Approach to Optimize I_(on)/I_(off) by Drain Engineering and Work Function Engineering

机译：锗-无结隧道场效应晶体管的器件物理及其通过漏极工程和功函数工程优化I_（on）/ I_（off）的方法
- 作者：Bahniman Ghosh;Punyasloka Bal;Partha Mondal;M. W. Akram
- 期刊名称：《Journal of Low Power Electronics》 | 2014年第1期
- Dual Metal Gate (DMG);
- OFF State;
- ON State;
- Drain Engineering;
- Work Function Engineering;
- Junctionless Tunnel FET (JLTFET);
2.Novel Robust Single Layer Wire Crossing Approach for Exclusive OR Sum of Products Logic Design with Quantum-Dot Cellular Automata

机译：具有量子点元胞自动机的产品逻辑设计的异或总和的新型鲁棒单层导线交叉方法
- 作者：Shaahin Angizi;Esam Alkaldy;Nader Bagherzadeh;Keivan Navi
- 期刊名称：《Journal of Low Power Electronics》 | 2014年第2期
- Quantum-Dot Cellular Automata;
- Nanoelectronics;
- Wire Crossing;
- Three-Input XOR;
- Parity Generator;
- Full Adder;
- Compressor;
- ESOP;
3.Low Power and Area Efficient Carry Select Adder

机译：低功耗和面积有效的进位选择加法器
- 作者：V. Nithish Kumar;Pani Prithvi Raj;G. Lakshminarayanan;Mathini Sellathurai
- 期刊名称：《Journal of Low Power Electronics》 | 2014年第4期
4.Ab-Initio Modeling of Effect of Boron and Phosphorus Doping in CoFe/MgO Magnetic Tunnel Junctions

机译：从头算建模在CoFe / MgO磁性隧道结中硼和磷掺杂的影响
- 作者：Ankit Kumar Verma;Bahniman Ghosh;Bhaskar Awadhiya;Tangudu Bharat Kumar
- 期刊名称：《Journal of Low Power Electronics》 | 2014年第3期
5.Hybrid Fuel Cell Power System for Electric Vehicles Application

机译：电动汽车混合燃料电池动力系统应用
- 作者：Azhar UI-Haq;Marium Jalal Chaudhry;Farhat Saleemi
- 期刊名称：《Journal of Low Power Electronics》 | 2014年第1期
- Fuel Cells;
- Energy Storage Systems;
- Electric Vehicles;
- Power Converter;
6.Low Power 28 nm Fully Depleted Silicon on Insulator 2.45 GHz Phase Locked Loop

机译：绝缘子上的低功耗28 nm全耗尽硅2.45 GHz锁相环
- 作者：Alexandre Fonseca;Emeric de Foucauld;Philippe Lorenzini;Gilles Jacquemod
- 期刊名称：《Journal of Low Power Electronics》 | 2014年第1期
- FDSOI;
- PLL;
- DCC;
- FLL;
- Phase Noise;
- Spurious;
- Calibration;
- PVT;
- Monte Carlo;
7.Enhancing the Static Noise Margins by Upsizing Length for Ultra-Low Voltage/Power/Energy Gates

机译：通过增加超低电压/功率/能量门的长度来增加静态噪声余量
- 作者：Mihai Tache;Valeriu Beiu;Walid Ibrahim;Fekri Kharbash;Massimo Alioto
- 期刊名称：《Journal of Low Power Electronics》 | 2014年第1期
- CMOS;
- Logic Gates;
- Sizing;
- Static Noise Margin;
- Low Voltage;
- Low Power;
8.Low Power-Variable Resolution Analog-to-Digital Converter

机译：低功耗可变分辨率模数转换器
- 作者：Saloni Varshney;Manish Goswami;B. R. Singh;A. Srivastava
- 期刊名称：《Journal of Low Power Electronics》 | 2014年第2期
- Variable Resolution;
- Analog to Digital Converters;
- Pipeline;
- Power Dissipation;
- INL;
- DNL;
9.Message Passing-Aware Power Management on Many-Core Systems

机译：多核系统上的消息传递感知电源管理
- 作者：Andrea Bartolini;Can Hankendi;Ayse Kivilcim Coskun;Luca Benini
- 期刊名称：《Journal of Low Power Electronics》 | 2014年第4期
- Message Passing;
- Dynamic Voltage and Frequency Scaling;
- Many-Core Systems;
10.Distributed Task Migration in a Homogeneous Many-Core System for Leakage and Fan Power Reduction

机译：均质多核系统中的分布式任务迁移，以减少泄漏和风扇功率
- 作者：Yang Ge;Yukan Zhang;Qinru Qiu
- 期刊名称：《Journal of Low Power Electronics》 | 2014年第4期
- Low Power;
- Task Allocation;
- Thermal Aware;
- Multi-Agent Distributed Framework;
11.Thermal Model with Metal Consideration for System-on-Chip Testing

机译：考虑金属的热模型用于片上系统测试
- 作者：Hasliza Hassan;Chia Yee Ooi
- 期刊名称：《Journal of Low Power Electronics》 | 2014年第3期
- Thermal Effects;
- RC Time Constant;
- Metal Interconnect;
- Finite Element;
- Thermal Simulation;
12.A Compact Two Dimensional Analytical Modeling of Nanoscale Fully Depleted Dual Material Gate Strained SOI/SON MOSFETs for Subdued SCEs

机译：柔和的SCE的纳米级全耗尽双材料栅极应变SOI / SON MOSFET的紧凑二维分析建模
- 作者：Saheli Sarkhel;Bibhas Manna;Subir Kumar Sarkar
- 期刊名称：《Journal of Low Power Electronics》 | 2014年第3期
- Dual Material Gate (DMG);
- Short Channel Effects (SCEs);
- SON MOSFET;
- Two Dimensional Modeling;
- Fully Depleted;
13.Design of Reconfigurable Filter Bank Architecture Using Improved Coefficient Decimation-Interpolation-Masking Technique for Multi-Standard Wireless Communication Receivers

机译：多标准无线通信接收机中采用改进系数抽取插值掩盖技术的可重构滤波器组架构设计
- 作者：Sumedh Dhabu;K. G. Smitha;A. P. Vinod
- 期刊名称：《Journal of Low Power Electronics》 | 2014年第3期
- Digital Filter Bank;
- Low Complexity;
- Multi-Standard Radio;
- Reconfigurable;
14.A Profile for GPS Data Reliable Transmission Based on Bluetooth Low Energy

机译：基于低功耗蓝牙的GPS数据可靠传输配置文件
- 作者：Peng Ye;Youcong Ni;Xin Du;Datong Xie
- 期刊名称：《Journal of Low Power Electronics》 | 2014年第2期
- BLE;
- Application Profile;
- GPS;
- Data Transmission;
15.Differential Voltage Mode On-Chip Serial Transceiver for Global Interconnects

机译：用于全局互连的差分电压模式片上串行收发器
- 作者：M. Bhaskar;B. Venkataramani
- 期刊名称：《Journal of Low Power Electronics》 | 2014年第2期
16.A Modular Design to Synthesize Symmetric Functions Using Quantum Quaternary Logic

机译：利用量子四元逻辑合成对称函数的模块化设计
- 作者：Arighna Deb;Debesh K. Das;Susmita Sur-Kolay
- 期刊名称：《Journal of Low Power Electronics》 | 2014年第3期
- Reversible Logic;
- Quantum Logic;
- Quaternary Half Adder;
- Quaternary Partial Half Adder;
- Symmetric Functions;
17.Asynchronous Parallel Platforms with Balanced Performance and Energy

机译：具有性能和能量平衡的异步并行平台
- 作者：Liang Men;Jia Di
- 期刊名称：《Journal of Low Power Electronics》 | 2014年第4期
- Asynchronous Circuit;
- Parallel Architecture;
- DVS;
- NULL Cycle Reduction;
- Energy Efficiency;
18.A Configurable Architecture to Limit Inrush Current in Power-Gated Reconfigurable Devices

机译：可配置架构，可限制电源门控可重配置设备中的浪涌电流
- 作者：Assem A. M. Bsoul;Steven J. E. Wilton
- 期刊名称：《Journal of Low Power Electronics》 | 2014年第1期
- FPGA;
- Inrush Current;
- Leakage Power;
- Low Power;
- Power Gating;
19.Junctionless Silicon-Nanowire Gate-All-Around Tunnel Field Effect Transistor

机译：无结硅纳米线栅极全能隧道场效应晶体管
- 作者：M. W. Akram;Bahniman Ghosh
- 期刊名称：《Journal of Low Power Electronics》 | 2014年第2期
20.Effect of Nanoribbon Width and Strain on the Electronic Properties of the WS2 Nanoribbon

机译：纳米带宽度和应变对WS2纳米带电子性能的影响
- 作者：Bahniman Ghosh;Aayush Gupta
- 期刊名称：《Journal of Low Power Electronics》 | 2014年第3期
- Transition Metal Dichalcogenides;
- Tungstenite;
- Strain;
- Band-Structure;
21.A Simplified Mathematical Toolbox for Thermal Runaway Analysis

机译：用于热失控分析的简化数学工具箱
- 作者：Francois Druilhe
- 期刊名称：《Journal of Low Power Electronics》 | 2014年第1期
- Thermal Runaway;
- Thermal Stability;
- Leakage Specifications;
22.Design of High Sensitivity Radiofrequency Energy Harvesters Dedicated to Low-Power Applications

机译：专用于低功耗应用的高灵敏度射频能量收集器的设计
- 作者：Dean Karolak;Thierry Taris;Yann Deval;Jean-Baptiste Begueret;Andre Mariano
- 期刊名称：《Journal of Low Power Electronics》 | 2014年第1期
- Rectifier;
- Power Efficiency;
- Wireless Power Transmission;
- RF Energy Harvesting;
- High Efficiency;
- Far-Field;
23.0.5 V RMS-to-DC Converter Topologies Suitable for Implantable Biomedical Devices

机译：适用于可植入生物医学设备的0.5 V RMS至DC转换器拓扑
- 作者：Filomila Kafe;Costas Psychalinos
- 期刊名称：《Journal of Low Power Electronics》 | 2014年第3期
24.In_(0.25)Ga_(0.75)As Channel Double Gate Junctionless Transistor

机译：In_（0.25）Ga_（0.75）As通道双栅极无结晶体管
- 作者：Bahniman Ghosh;Neelam Surana;M. W. Akram;Ball Mukund Mani Tripathi
- 期刊名称：《Journal of Low Power Electronics》 | 2014年第1期
- Junctionless Transistor;
- III-V Materials;
- Double Gate;
- Subthreshold Slope;
25.Process, Voltage and Temperature Variations Aware Low Leakage Approach for Nanoscale CMOS Circuits

机译：用于纳米级CMOS电路的工艺，电压和温度变化的低泄漏方法
- 作者：Vijay Kumar Sharma;Manisha Pattanaik
- 期刊名称：《Journal of Low Power Electronics》 | 2014年第1期
- Nanoscale CMOS;
- Leakage Current;
- LECTOR;
- ONOFIC;
- PDP;
- PVT Variations;
26.A Low Cost Design of Time Division Multiplexing Based 3rd Order Continuous-Time Incremental ΣΔ Modulator with Excess Loop Delay

机译：基于时分多路复用的具有过量环路延迟的三阶连续时间增量ΣΔ调制器的低成本设计
- 作者：Jos Prakash A. V.;Babita R. Jose
- 期刊名称：《Journal of Low Power Electronics》 | 2014年第3期
27.Low Noise and Fast Locking Phase Locked Loop Using a Variable Delay Element in the Phase Frequency Detector

机译：在相位频率检测器中使用可变延迟元件的低噪声和快速锁定锁相环
- 作者：Umakanta Nanda;Debiprasad Priyabrata Acharya;Sarat Kumar Patra
- 期刊名称：《Journal of Low Power Electronics》 | 2014年第1期
- Phase Noise;
- Phase Frequency Detector;
- Dead Zone;
- Charge Pump;
- Phase Locked Loop;
28.Effect of Traps on the Performance of Nanowire Si Junctionless Tunnel FET

机译：陷阱对纳米线Si无结隧道FET性能的影响
- 作者：Shibir Basak;Bahniman Ghosh
- 期刊名称：《Journal of Low Power Electronics》 | 2014年第4期
- Junctionless Tunnel Field Effect Transistor;
- Trap Assisted Tunneling;
- High-k Dielectric;
- Acceptor Level Traps;
- Bulk Traps;
- Deep Traps;
29.Simulation of 2 Bit by 2 Bit Binary Multiplier Using Magnetic Tunnel Junction Device

机译：利用磁隧道结器件模拟2位2位二进制乘法器
- 作者：Yuvaneet Bhaker;Princepreet Singh;Bahniman Ghosh
- 期刊名称：《Journal of Low Power Electronics》 | 2014年第4期
- Spintronics;
- Magnetic Tunnel Junctions;
- Binary-Multiplier;
30.A Robust and Energy Efficient Pulse-Triggered Flip-Flop Design for Ultra Low Voltage Operations

机译：用于超低压操作的稳健且节能的脉冲触发触发器设计
- 作者：Sebastien Bernard;Alexandre Valentian;David Bol;Jean-Didier Legat;Marc Belleville
- 期刊名称：《Journal of Low Power Electronics》 | 2014年第1期
- CMOS Digital Circuits;
- FDSOI;
- Standard-Cell Design;
- Low-Voltage;
- Pulsed Flip-Flop;
- Delay Generator;
31.Impact of High-K Spacer on Junctionless Transistor in Sub-Threshold Regime

机译：亚阈值状态下高K垫片对无结晶体管的影响
- 作者：Bahniman Ghosh;Partha Mondal;M. W. Akram;Punyasloka Bal
- 期刊名称：《Journal of Low Power Electronics》 | 2014年第2期
- Junctionless Transistors (JLTs);
- Band-to-Band Tunneling (BTBT);
- High-K Spacers;
32.Characterization Methodology for MOSFET Local Systematic Variability in Presence of Statistical Variability

机译：存在统计变异性时MOSFET局部系统变异性的表征方法
- 作者：Omar Jonani Franco Piliado;Giancarlo Castaneda;Andre Juge;Gerard Ghibaudo
- 期刊名称：《Journal of Low Power Electronics》 | 2014年第1期
- MOSFET;
- Variability;
- Systematic Effects;
- Process Variations;
- Local Layout Effects;
- Statistical Variations;
- Sensors;
- Characterization Methodology;
33.Impact of Collector Length on the Performance of NPN SiGe HBT on Thin Film SOI

机译：集电极长度对薄膜SOI上NPN SiGe HBT性能的影响
- 作者：Prasanna Kumar Misra;S. Qureshi
- 期刊名称：《Journal of Low Power Electronics》 | 2014年第3期
- Sentaurus;
- Npn SiGe HBT;
- SOI;
- SOI BiCMOS;
- Lateral Scaling;
34.0.5V Sinh-Domain Design of Activation Functions and Neural Networks

机译：激活函数和神经网络的0.5V正弦域设计
- 作者：N. A. Kant;F. A. Khanday;Costas Psychalinos
- 期刊名称：《Journal of Low Power Electronics》 | 2014年第2期
35.Design and Analysis of Robust Spin Transfer Torque Magnetic Random Access Memory Bitcell Using FinFET

机译：基于FinFET的鲁棒自旋传递转矩磁性随机存取存储位单元设计与分析
- 作者：Arundhati Bhattacharya;Aminul Islam
- 期刊名称：《Journal of Low Power Electronics》 | 2014年第2期
- Spintronics;
- MTJ;
- TMR Ratio;
- MRAM;
- FinFET;
- Read Margin;
- Write Margin;
- Variability;
36.Energy Consumption by Reversible Circuits in the 130 nm and 65 nm Nodes

机译：130 nm和65 nm节点中可逆电路的能耗
- 作者：Stephane Burignat;Alexis De Vos
- 期刊名称：《Journal of Low Power Electronics》 | 2014年第3期
- Reversible Computation;
- Adiabatic Signal;
- Energy;
- Consumption;
- CMOS Technology;
- 350 nm;
- 130 nm;
- 65 nm;
- Threshold Voltage;
- Design;
- Implementation;
- Ripple-Carry Adder;
- Quantum Computing;
37.On the Suitability of Single-Walled Carbon Nanotube Bundle Interconnects for High-Speed and Power-Efficient Applications

机译：单壁碳纳米管束互连器在高速和节能应用中的适用性
- 作者：Manodipan Sahoo;Hafizur Rahaman;Bhargab B. Bhattacharya
- 期刊名称：《Journal of Low Power Electronics》 | 2014年第3期
- Single-Walled Carbon Nanotube (SWCNT);
- ITRS;
- ABCD-Parameter;
- Technology Scaling;
- Elmore Model;
- Repeater;
38.Sleep Mode and Wakeup Method for OpenFlow Switches

机译：OpenFlow交换机的睡眠模式和唤醒方法
- 作者：T. H. Vu;V. C. Luc;N. T. Quan;T. Thanh;N. H. Thanh;P. N. Nam
- 期刊名称：《Journal of Low Power Electronics》 | 2014年第3期
- OpenFlow Switch;
- NetFPGA;
- Low Power;
- Data Center Network;
- Green Networking;
39.Domain Wall Dynamics Due to Voltage Controlled Magnetic Anisotropy

机译：压控磁各向异性引起的畴壁动力学
- 作者：Bahniman Ghosh;Gaurav Solanki;Abhishek Banerjee
- 期刊名称：《Journal of Low Power Electronics》 | 2014年第1期
- Domain Wall Motion;
- Spin-Polarized Currents;
- Voltage Controlled Magnetic Anisotropy;
- Spin Transfer Torque;
40.Accurate Energy-Aware Workload Distribution for Wireless Sensor Networks Using a Detailed Communication Energy Cost Model

机译：使用详细的通信能耗模型，用于无线传感器网络的准确的能源意识工作量分配
- 作者：Yanqiu Huang;Wanli Yu;Alberto Garcia-Ortiz
- 期刊名称：《Journal of Low Power Electronics》 | 2014年第2期
- Wireless Sensor Networks (WSNs);
- Energy-Aware Workload Partition;
- Scheduling;
- Communication Energy;
- Power-Macromodel;
41.Analysis and Optimization of MPSoC Reliability

机译：MPSoC可靠性的分析和优化
- 作者：Ayse Kivilcim Coskun;Tajana Simunic Rosing;Kresimir Mihic;Giovanni De Micheli;Yusuf Leblebici
- 期刊名称：《Journal of Low Power Electronics》 | 2006年第1期
- Reliability;
- Power Management;
- Optimization Methods;
- Simulation Methodologies;
42.CMOS Leakage and Glitch Minimization for Power-Performance Tradeoff

机译：CMOS泄漏和毛刺最小化，以权衡性能
- 作者：Yuanlin Lu;Vishwani D. Agrawal
- 期刊名称：《Journal of Low Power Electronics》 | 2006年第3期
43.Multiclock Domain and Dynamic Frequency Scaling Applied to the Control Unit of a Battery Powered for 1 cm{sup}3 Microrobot

机译：多时钟域和动态频率缩放应用于应用于1 cm {sup} 3微型机器人的电池的控制单元
- 作者：Raimon Casanova;Angel Dieguez;Anna Arbat;Josep Samitier
- 期刊名称：《Journal of Low Power Electronics》 | 2006年第2期
- Microrobotics;
- Micro-Nanomanipulation;
- GALS and DFS;
44.Energy-Aware Dual-Rail Bit-Wise Completion Pipelined Arithmetic Circuit Design

机译：节能型双轨位智能完成流水线算术电路设计
- 作者：Jia Di;J. S. Yuan
- 期刊名称：《Journal of Low Power Electronics》 | 2006年第2期
- Energy-Awareness;
- Dual-Rail Encoding;
- NCL;
- Zero Insertion;
- Bit-Wise Completion;
45.A Load-Store Queue Design Based on Predictive State Filtering

机译：基于预测状态过滤的负载存储队列设计
- 作者：Fernando Castro;Daniel Chaver;Luis Pinuel;Manuel Prieto;Michael C. Huang;Francisco Tirado
- 期刊名称：《Journal of Low Power Electronics》 | 2006年第1期
- Microarchitecture Power Aware Design;
- Load-Store Queue;
- State Filtering;
- Dependence Prediction;
46.Software Level Power Consumption Models and Power Saving Techniques for Embedded DSP Processors

机译：嵌入式DSP处理器的软件级功耗模型和节能技术
- 作者：C. J. Bleakley;Miguel Casas-Sanchez;Jose Rizo-Morente
- 期刊名称：《Journal of Low Power Electronics》 | 2006年第2期
- Low Power DSP;
- Software Level Power Estimation;
- Software Optimization;
- Power Benchmarks;
47.An Effective Combinatorial Algorithm for Gate-Level Threshold Voltage Assignment

机译：门级阈值电压分配的有效组合算法
- 作者：Soheil Ghiasi
- 期刊名称：《Journal of Low Power Electronics》 | 2006年第3期
- Algorithm;
- Logic Synthesis;
- Leakage;
- Delay Budgeting;
- Implementation Selection;
- Slack Distribution;
- Threshold Voltage Assignment;
48.Analysis of Leakage Power Reduction in Dual-V{sub}(th) Technologies in the Presence of Large Threshold Voltage Variation

机译：阈值电压变化较大时双V {sub}（th）技术的漏电降低分析
- 作者：Wei-Shen Wang;Michael Liu;Michael Orshansky
- 期刊名称：《Journal of Low Power Electronics》 | 2006年第1期
- Power Minimization;
- Leakage;
- Reliability;
- Variability;
- Yield;
49.An Efficient Assignment of Voltages and Optional Cycles for Maximizing Rewards in Real-Time Systems with Energy Constraints

机译：有效分配电压和可选周期，以在具有能量约束的实时系统中最大化报酬
- 作者：Ali Mahdoum;Nadjib Badache;Hamid Bessalah
- 期刊名称：《Journal of Low Power Electronics》 | 2006年第2期
50.Subthreshold to Above Threshold Level Shifter Design

机译：亚阈值高于阈值电平转换器设计
- 作者：Tai-Hua Chen;Jinhui Chen;Lawrence T. Clark
- 期刊名称：《Journal of Low Power Electronics》 | 2006年第2期
- CMOS;
- Level Shifter;
- Low-Power;
- Multiple-Supply Voltages;
- Subthreshold Operation;
- VLSI;
51.Implementation Strategy and Results of an Energy-Aware System-on-Chip for 5 GHz WLAN Applications

机译：5 GHz WLAN应用的节能片上系统的实施策略和结果
- 作者：Labros Bisdounis;Spyridon Blionas;Enrico Macii;Spiridon Nikolaidis;Roberto Zafalon
- 期刊名称：《Journal of Low Power Electronics》 | 2006年第1期
52.Reducing Instruction Translation Look-Aside Buffer Energy Through Compiler-Directed Resizing

机译：通过编译器控制的大小调整来减少指令翻译后备缓冲区的能量
- 作者：Bramha Allu;Wei Zhang
- 期刊名称：《Journal of Low Power Electronics》 | 2006年第2期
- Instruction TLB;
- Energy Consumption;
- Compiler;
- Dynamic Resize;
53.Super Class AB OTAs Based on Low-Power Adaptive Techniques at the Input Stage and the Active Load

机译：基于低功率自适应技术的输入级和有功负载的超级AB类OTA
- 作者：J. Galan;Ramon G. Carvajal;J. Ramirez-Angulo;Antonio J. Lopez-Martin;C. Rubia-Marcos
- 期刊名称：《Journal of Low Power Electronics》 | 2006年第2期
54.Power Optimized Design of CMOS Programmable Gain Amplifiers

机译：CMOS可编程增益放大器的功率优化设计
- 作者：Srikanth Mohan;Arun Ravindran;David Binkley;Arindam Mukherjee
- 期刊名称：《Journal of Low Power Electronics》 | 2006年第2期
- Cascode Regulation;
- CMOS Transresistance Amplifier;
- Inversion Coefficient;
- Programmable Gain Amplifier;
55.Static Random Access Memory Cells with Intrinsically High Read Stability and Low Standby Power

机译：本质上具有高读取稳定性和低待机功率的静态随机存取存储单元
- 作者：Sayeed A. Badrudduza;Giby Samson;Lawrence T. Clark
- 期刊名称：《Journal of Low Power Electronics》 | 2006年第3期
- SRAM Leakage;
- SRAM Write Margin;
- Static Noise Margin;
- SRAM Cell Stability;
- Sense Amplifier;
56.Transistor Sizing of Logic Gates to Maximize Input Delay Variability

机译：逻辑门的晶体管大小可最大化输入延迟可变性
- 作者：Tezaswi Raja;Vishwani D. Agrawal;Michael L. Bushnell
- 期刊名称：《Journal of Low Power Electronics》 | 2006年第1期
- Low Power CMOS;
- Transistor Sizing;
- Gate Sizing;
- Variable Input Delay Gate;
- Gate Delay;
- Dynamic Power;
- Leakage;
- Gate Design;
- Delay Elements;
- Transmission Gates;
57.Defect Tolerant Voter Designs Based on Transistor Redundancy

机译：基于晶体管冗余的容错选民设计
- 作者：Z. Abid;H. El-Razouk
- 期刊名称：《Journal of Low Power Electronics》 | 2006年第3期
- Defect Tolerant Design;
- Majority Voter;
- TMR Technique;
- QTR Technique;
- n-bit Adders;
- Transistor Redundancy;
58.Temporal Redundancy Based Encoding Technique for Peak Power and Delay Reduction of On-Chip Buses

机译：基于时间冗余的片上总线峰值功率和延迟减少编码技术
- 作者：K. Najeeb;Vishal Gupta;V. Kamakoti;Madhu Mutyam
- 期刊名称：《Journal of Low Power Electronics》 | 2006年第3期
- Bus Encoding;
- Crosstalk;
- Coupling Capacitance;
- Delay;
- Interconnect;
- Peak-Power;
- Self-Shielding Codes;
- Temporal Redundancy;
59.System Wide Dynamic Power Management for Weakly Hard Real-Time Systems

机译：弱硬实时系统的全系统动态电源管理
- 作者：Linwei Niu;Gang Quan
- 期刊名称：《Journal of Low Power Electronics》 | 2006年第3期
- Dynamic Power Management;
- Weakly Hard Real-Time;
- Power-Aware Scheduling;
- Quality of Service;
- I/O Devices;
60.Power Distribution Techniques for Dual VDD Circuits

机译：双VDD电路的配电技术
- 作者：Sarvesh H. Kulkarni;Dennis Sylvester
- 期刊名称：《Journal of Low Power Electronics》 | 2006年第2期
- Power Delivery;
- Low-Power Design;
- Multi-VDD Design;
61.An Advanced Low Power and Versatile CMOS Current Driver for Multi-Electrode Cochlear Implant Microstimulator

机译：用于多电极人工耳蜗微刺激器的先进的低功耗，多功能CMOS电流驱动器
- 作者：Mohamed Ghorbel;Ahmed Ben Hamida;Mounir Samet;Jean Thomas
- 期刊名称：《Journal of Low Power Electronics》 | 2006年第3期
- Cochlear Implant;
- Microstimulator;
- Programmable Stimulation;
- Current Drivers;
- DSP;
- Numerical Current Pulse;
62.Energy-Efficient Value Based Selective Refresh for Embedded DRAMS

机译：嵌入式DRAM的基于节能值的选择性刷新
- 作者：Kimish Patel;Enrico Macii;Massimo Poncino;Luca Benini
- 期刊名称：《Journal of Low Power Electronics》 | 2006年第1期
- EDRAM;
- Energy Consumption;
- Low-Power Design;
- Selective Refresh;
63.Systematic Preprocessing of Data Dependent Constructs for Embedded Systems

机译：嵌入式系统数据相关构造的系统预处理
- 作者：Martin Palkovic;Erik Brockmeyer;Peter Vanbroekhoven;Henk Corporaal;Francky Catthoor
- 期刊名称：《Journal of Low Power Electronics》 | 2006年第1期
64.Reducing Power Dissipation in SRAM during Test

机译：降低测试期间SRAM中的功耗
- 作者：Luigi Dilillo;Paul Rosinger;Bashir M. Al-Hashimi;Patrick Girard
- 期刊名称：《Journal of Low Power Electronics》 | 2006年第2期
- SRAM;
- Low Power;
- Test March;
- Pre-Charge;
65.Energy Estimation of the Memory Subsystem in Multiprocessor Systems

机译：多处理器系统中内存子系统的能量估计
- 作者：Eric F. Weglarz;Kewal K. Saiuja;Mikko H. Lipasti
- 期刊名称：《Journal of Low Power Electronics》 | 2006年第3期
- Multiprocessor Power Estimation;
- Coherence Energy;
- Memory Subsystem;
66.Power - Performance Optimization for Custom Digital Circuits

机译：功率-定制数字电路的性能优化
- 作者：Radu Zlatanovici;Borivoje Nikolic
- 期刊名称：《Journal of Low Power Electronics》 | 2006年第1期
- Power - Performance Optimization;
- Convex Optimization;
- CMOS;
- Static Timing;
- Timing Models;
67.On Reducing Peak Capture Power of Transition Delay Fault Test for SoCs with Unwrapped Cores

机译：降低具有未封装内核的SoC的转换延迟故障测试的峰值捕获功率的研究
- 作者：V. R. Devanathan;C. P. Ravikumar;V. Kamakoti
- 期刊名称：《Journal of Low Power Electronics》 | 2006年第3期
- Peak Capture Power;
- Hierarchical Scan Test;
- Transition Delay Fault;
- Unwrapped Cores;
68.An Activity Monitor for Power/Performance Tuning of CMOS Digital Circuits

机译：用于CMOS数字电路功率/性能调整的活动监视器
- 作者：Josep Rius;Maurice Meijer;Jose Pineda de Gyvez
- 期刊名称：《Journal of Low Power Electronics》 | 2006年第1期
- CMOS Monitors;
- Activity;
- Power Consumption;
69.Communication Power Optimization for Network-on-Chip Architectures

机译：片上网络架构的通信功率优化
- 作者：Dongkun Shin;Jihong Kim
- 期刊名称：《Journal of Low Power Electronics》 | 2006年第2期
- Network-On-Chip;
- Dynamic Voltage Scaling;
- Real-Time Systems;
- Low-Power Design;
70.Low Power and High Performance Arithmetic Circuits in Feedthrough CMOS Logic Family for Low Power Applications

机译：直通CMOS逻辑系列中的低功耗高性能运算电路，适用于低功耗应用
- 作者：Victor Navarro-Botello;Juan A. Montiel-Nelson;Saeid Nooshabadi
- 期刊名称：《Journal of Low Power Electronics》 | 2006年第2期
- Feedthrough Logic;
- Low Power Arithmetic Circuits;
- High Speed CMOS Techniques;
71.Scan-Based Structure with Reduced Static and Dynamic Power Consumption

机译：减少静态和动态功耗的基于扫描的结构
- 作者：Shervin Sharifi;Javid Jaffari;Mohammad Hosseinabady;Ali Afzali-Kusha;Zainalabedin Navabi
- 期刊名称：《Journal of Low Power Electronics》 | 2006年第3期
- Scan Structures;
- Design for Test;
- Low Power Test;
- Static Power Reduction;
- Dynamic Power Reduction;
- Scan Based Test;
72.Power Management Through Dynamic Frequency Scaling for Low and Medium Bit-Rate Digital Receivers

机译：通过动态频率缩放对中低比特率数字接收器进行电源管理
- 作者：A. P. Kakarountas;N. D. Zervas;G. Theodoridis;H. E. Michail;D. Soudris
- 期刊名称：《Journal of Low Power Electronics》 | 2006年第3期
- Low-Power Design;
- Dynamic Power Management;
- Digital Receivers;
- Communications;
- VLSI;
73.Low Power Techniques Applied to a 80C51 Microcontroller for High Temperature Applications

机译：低功耗技术应用于80C51高温应用微控制器
- 作者：Philippe Manet;Renaud Ambroise;David Bol;Marc Baltus;Jean-Didier Legat
- 期刊名称：《Journal of Low Power Electronics》 | 2006年第1期
- Microcontroller;
- Low Power;
- Clock Gating;
- Data Gating;
- SOI Technology;
- High Temperature;
74.Low-Voltage Low-Power Broadband CMOS Analogue Circuit for White Gaussian Noise Generation

机译：用于产生高斯白噪声的低压低功耗宽带CMOS模拟电路
- 作者：Guiomar Evans;Joao Goes;Nuno Paulino
- 期刊名称：《Journal of Low Power Electronics》 | 2006年第2期
75.A Fast, Dynamic, Fine-Detail, Source Level Technique to Estimate the Energy Consumed by Embedded Software on Single-Issue Processor Cores

机译：一种快速，动态，精细，源级别的技术，可估计单问题处理器内核上嵌入式软件的能耗
- 作者：Daniele Paolo Scarpazza;Carlo Brandolese
- 期刊名称：《Journal of Low Power Electronics》 | 2006年第2期
- Embedded Systems;
- Energy;
- Power;
- Estimation;
- Optimization;
76.Low-Power Perceptron Branch Predictor

机译：低功率感知器分支预测器
- 作者：Kaveh Aasaraai;Amirali Baniasadi
- 期刊名称：《Journal of Low Power Electronics》 | 2006年第3期
- Branch Prediction;
- Perceptron;
- Power-Aware Design;
77.Accurate Logic-Level Current Estimation for Digital CMOS Circuits

机译：数字CMOS电路的准确逻辑级电流估计
- 作者：P. Ruiz-de-Clavijo;J. Juan-Chico;M. J. Bellido;A. Millan;D. Guerrero;E. Ostua;J. Viejo
- 期刊名称：《Journal of Low Power Electronics》 | 2006年第1期
- CMOS VLSI;
- Current Estimation;
- Logic-Level Simulation;
- Delay Model;
- Switching Activity;
78.Back-Annotation in High-Speed Asynchronous Design

机译：高速异步设计中的后注释
- 作者：Pankaj Golani;Peter A. Beerel
- 期刊名称：《Journal of Low Power Electronics》 | 2006年第1期
- High-Speed Asynchronous Design;
- ASIC Design Flow;
- Back Annotation;
79.Gate Sizing and V{sub}t Assignment for Active-Mode Leakage Power Reduction

机译：栅极尺寸调整和V {sub} t分配，可降低有源模式泄漏功率
- 作者：Feng Gao;John P. Hayes
- 期刊名称：《Journal of Low Power Electronics》 | 2006年第2期
- Dual V{sub}t;
- Gate Sizing;
- Leakage;
- Mixed-Integer Linear Programming;
- Power Optimization;
80.SRAM Cell Optimization for Ultra-Low Power Standby

机译：用于超低功耗待机的SRAM单元优化
- 作者：Huifang Qin;Rakesh Vattikonda;Thuan Trinh;Yu Cao;Jan Rabaey
- 期刊名称：《Journal of Low Power Electronics》 | 2006年第3期
- SRAM;
- Standby;
- Leakage;
- DRV;
- Data Retention;
- Sizing;
- Body Bias;
- Process Variation;
81.A Low-Energy Reconfigurable Fabric for the SuperCISC Architecture

机译：用于SuperCISC架构的低能耗可重构结构
- 作者：Gayatri Mehta;Justin Stander;Josh Lucas;Raymond R. Hoare;Brady Hunsaker;Alex K. Jones
- 期刊名称：《Journal of Low Power Electronics》 | 2006年第2期
- Reconfigurable;
- Architecture;
- Synthesis;
- Design Space Exploration;
- FPGA;
82.WARM SRAM: A Novel Scheme to Reduce Static Leakage Energy in SRAM Arrays

机译：WARM SRAM：一种减少SRAM阵列中静态泄漏能量的新颖方案
- 作者：Mahadevan Gomathisankaran;Akhilesh Tyagi
- 期刊名称：《Journal of Low Power Electronics》 | 2006年第3期
- Leakage Energy;
- SRAM;
- On-Chip Cache;
83.Statistical Leakage Minimization of Digital Circuits Using Gate Sizing, Gate Length Biasing, and Threshold Voltage Selection

机译：使用栅极尺寸，栅极长度偏置和阈值电压选择来使数字电路的统计泄漏最小化
- 作者：Sarvesh Bhardwaj;Yu Cao;Sarma Vrudhula
- 期刊名称：《Journal of Low Power Electronics》 | 2006年第2期
- Leakage Minimization;
- Statistical Optimization;
- Gate Sizing;
- Convex Optimization;
- Probability;
- Gate Length Biasing;
84.On the use of Feedback Systems to Dynamically Control the Supply Voltage of Low-Power Circuits

机译：关于使用反馈系统动态控制低功率电路的电源电压
- 作者：David Rios-Arambula;Aurelien Buhrig;Gilles Sicard;Marc Renaudin
- 期刊名称：《Journal of Low Power Electronics》 | 2006年第1期
- Low Power;
- Asynchronous Circuits;
- Microprocessors;
- Dynamic Voltage Scaling (DVS);
- Process Control;
- DC-DC Converters;
85.Power Supply Selective Mapping for Accurate Timing Analysis

机译：电源选择性映射，可进行准确的时序分析
- 作者：Cristiano Forzan;Davide Pandini;Mariagrazia Graziano
- 期刊名称：《Journal of Low Power Electronics》 | 2006年第1期
- Power Supply Voltage;
- Static Timing Analysis;
- Sign-Off Verification;
- Derating Factors;
86.Temperature-Aware Floorplanning of 3-D ICs Considering Thermally Dependent Leakage Power

机译：考虑热泄漏功率的3-D IC的温度感知布局
- 作者：Yangdong (Steven) Deng;Peng Li
- 期刊名称：《Journal of Low Power Electronics》 | 2006年第2期
- 3-D Integration;
- Monolithic Integrated Circuits;
- VLSI;
- Floorplanning;
- Integrated Circuit Thermal Factor;
- Leakage Power;
87.Low-Power CMOS Ramp Generator Circuit for DC-DC Converters

机译：用于DC-DC转换器的低功耗CMOS斜坡发生器电路
- 作者：H. Pooya Forghani-zadeh;Gabriel A. Rincon-Mora
- 期刊名称：《Journal of Low Power Electronics》 | 2006年第3期
- Signal Generator;
- Ramp Generator;
- DC-DC Converter;
- Switching Regulator;
- Low Power;
- Power Efficient;
88.Improving the Performance of Static CMOS Gates by Using Independent Bodies

机译：通过使用独立的机构改善静态CMOS栅极的性能
- 作者：D. Guerrero;A. Millan;J. Juan;M. J. Bellido;P. Ruiz-de-Clavijo;E. Ostua;J. Viejo
- 期刊名称：《Journal of Low Power Electronics》 | 2007年第1期
- Low Power;
- High Speed;
- CMOS Digital Gates;
- Body Effect;
- Parasitic Capacitance;
89.Energy-Efficient Techniques for Disk-Based Mobile Systems

机译：基于磁盘的移动系统的节能技术
- 作者：Young-Jin Kim;Jihong Kim
- 期刊名称：《Journal of Low Power Electronics》 | 2007年第3期
- Disk Replacement;
- File Placement;
- Low-Power Disk;
- Low-Power Mobile Storage;
- Low-Power Systems;
90.Novel Adaptive Body Biasing Techniques for Energy Efficient Subthreshold CMOS Circuits

机译：高能效亚阈值CMOS电路的新型自适应人体偏置技术
- 作者：Walid M. Elgharbawy;Pradeep Golconda;Abdelhamid G. Moursy;Magdy A. Bayoumi
- 期刊名称：《Journal of Low Power Electronics》 | 2007年第2期
- CMOS Circuits;
- Subthreshold Logic;
- Dynamic Threshold MOS;
- Adaptive Body Bias;
91.A High Power Switch-Mode LED Driver with an Efficient Current Sensing Scheme

机译：具有高效电流感应方案的大功率开关模式LED驱动器
- 作者：Wing Yan Leung;Tsz Yin Man;Dongwei Zhang;Jin He;Mansun Chan
- 期刊名称：《Journal of Low Power Electronics》 | 2010年第1期
- Switch-Mode Converter;
- LED Driver;
- Current Sensing;
92.An Efficient Energy Estimation Methodology for Quasi Delay Insensitive Template-Based Asynchronous Circuits

机译：基于准延迟不敏感模板的异步电路的高效能量估计方法
- 作者：Behnam Ghavami;Hossein Pedram;Mahtab Niknahad
- 期刊名称：《Journal of Low Power Electronics》 | 2010年第1期
- Energy Estimation;
- Asynchronous QDI Circuit;
- High-Level Simulation;
93.Robust SRAM Design via Joint Sizing and Voltage Optimization Under Dynamic Stability Constraints

机译：在动态稳定性约束下，通过尺寸调整和电压优化实现的鲁棒SRAM设计
- 作者：Akshit Dayal;Peng Li;Garng M. Huang
- 期刊名称：《Journal of Low Power Electronics》 | 2010年第1期
- Static Noise Margin;
- Dynamic Noise Margin;
- Leakage Power;
- Access Time;
- Nonlinear Optimization;
94.An On-Chip Multi-Mode Buck DC-DC Converter for Fine-Grain DVS on a Multi-Power Domain SoC Using a 65-nm Standard CMOS Logic Process

机译：片上多模式降压DC-DC转换器，用于使用65 nm标准CMOS逻辑工艺的多电源域SoC上的细粒度DVS
- 作者：Motoi Ichihashi;Helene Lhermet;Edith Beigne;Frederic Rothan;Marc Belleville;Amara Amara
- 期刊名称：《Journal of Low Power Electronics》 | 2010年第1期
- CMOS;
- DVS;
- DVFS;
- SOC;
- DC-DC Converter;
95.A Novel Threshold Voltage Assignment for 3D Multicore Designs

机译：适用于3D多核设计的新型阈值电压分配
- 作者：Koushik Chakraborty;Sanghamitra Roy
- 期刊名称：《Journal of Low Power Electronics》 | 2010年第3期
- 3D Integrated Circuits;
- Threshold Voltage;
- Leakage;
- Multicore Systems;
96.A Refinement Methodology for Clock Gating Optimization at Layout Level in Digital Circuits

机译：一种数字电路布局级时钟选通优化的改进方法
- 作者：L. Benini;A. Bocca;A. Bonanno;A. Macii;E. Macii;J. L. Naget;C. Piguet;M. Poncino
- 期刊名称：《Journal of Low Power Electronics》 | 2010年第1期
- Clock Power Optimization;
- Clock-Gating;
97.Design and Analysis of Sub-DT Sub-Domino Logic Circuits for Ultra Low Power Applications

机译：超低功耗应用的Sub-DT Sub-Domino逻辑电路的设计与分析
- 作者：Ashutosh Nandi;Rajeevan Chandel
- 期刊名称：《Journal of Low Power Electronics》 | 2010年第4期
98.Power Aware High Level Synthesis of Hardware Coprocessors

机译：硬件协处理器的功率感知高级综合
- 作者：Sumit Ahuja;Wei Zhang;Avinash Lakshminarayana;Sandeep K. Shukla
- 期刊名称：《Journal of Low Power Electronics》 | 2010年第3期
- High Level Synthesis;
- Clock-Gating;
- Transaction Level Modeling;
- Power Estimation;
- Power Reduction;
- Power Model;
99.Design and Analysis of Location Caches in a NoC-Based Chip Multiprocessor System

机译：基于NoC的芯片多处理器系统中位置缓存的设计和分析
- 作者：D. Ramakrishnan;Y. L. Wu;W. B. Jone
- 期刊名称：《Journal of Low Power Electronics》 | 2010年第2期
- Cache Architecture;
- Location Cache;
- Low-Power Design;
- Gated-Ground Technique;
- Network-on-Chip;
100.Robust and Ultra Low Power Subthreshold Logic Circuits with Symmetric, Asymmetric, 3T, 4T DGFinFETs

机译：具有对称，非对称，3T，4T DGFinFET的强大，超低功耗亚阈值逻辑电路
- 作者：Ramesh Vaddi;S. Dasgupta;R. P. Agarwal
- 期刊名称：《Journal of Low Power Electronics》 | 2010年第1期
- Asymmetric;
- Circuit Styles;
- FinFET;
- Energy Efficient;
- Independent Gate (4T) DGMOSFET;
- Symmetric;
- Tied Gate (3T) DGMOSFET;
- Robust;
- Subthreshold Logic;
- Ultra Low Power;

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