Anomalous Kink Effect in Low-Dimensional Gate-Recessed Fully Depleted SOI MOSFET at Low Temperature

摘要

Nanoscale MOSFETs Gate-Recessed Channel (GRC) device with a silicon channel thickness (t(SI)) as low as 2.2 nm was first tested at room temperature for functionality check, and then tested at low temperature (77 K) for I-V characterizations. In spite of its FD-SOI nanoscale thickness, the GRC device has surprisingly exhibited a Kink Effect in the output characteristics at 77 K. The anomalous Kink Effect can be explained by the increase of the lateral electric field in the drain junction with the channel extension zone when lowering the temperature.