Degradation Characteristics of High-voltage AlGaN/GaN-on-Si Heterostructure FETs under a Reverse Gate Bias Stress

摘要

We have performed reverse gate bias stress tests on field-plated AlGaN/GaN heterostructure field-effect transistors (HFETs) on Si substrates with high breakdown voltage. The source-to-drain breakdown voltages measured under off-state conditions ranged from 615 to 816 V. However, a sudden increase in the gate leakage current was observed at a critical voltage in the range of 20 - 30 V during the reverse gate bias stress test with the source and the drain grounded. Two-terminal stress tests were performed on drain-gate and source-gate Schottky diodes, respectively. The reverse leakage currents of both diodes were increased although one electrode was floated during the stress test. This suggests that the defects generated by the stress-induced inverse piezoelectric effect provide a leakage path from the gate contact to the electron channel. The increase in the leakage depended on the location of peak electric field during the stress test. A time-dependent element of the degradation was also observed during the constant gate bias stress test at the critical voltage.