首页> 外文期刊>Journal de Physique, IV: Proceedings of International Conference >Back gate voltage and buried-oxide thickness influences on the series resistance of fully depleted SOI MOSFETs at 77 K
【24h】

Back gate voltage and buried-oxide thickness influences on the series resistance of fully depleted SOI MOSFETs at 77 K

机译:背栅电压和掩埋氧化物的厚度对77 K下完全耗尽的SOI MOSFET的串联电阻有影响

获取原文
获取原文并翻译 | 示例
           

摘要

This work studies the influence of the back gate voltage on the LDD SOI nMOSFETs series resistance at 300 K and 77 K and corresponding to two different buried oxide thicknesses. The MEDICI simulated results were used to support the analysis. It was observed that for lower buried oxide thickness the influence of the back gate bias is higher, mainly at 77 K. However, this influence becomes negligible when the back interface below the LDD region is inverted and the depletion region in the LDD reaches its maximum saturation value.
机译:这项工作研究了背栅电压对LDD SOI nMOSFET在300 K和77 K时的串联电阻的影响,并且对应于两个不同的掩埋氧化物厚度。 MEDICI模拟结果用于支持分析。已观察到,对于较低的掩埋氧化物厚度,背栅偏置的影响较大,主要在77 K处。但是,当LDD区域下方的背界面反转且LDD的耗尽区达到最大时,这种影响可以忽略不计。饱和度值。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号