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Modeling of the Channel Thickness Influence on Electrical Characteristics and Series Resistance in Gate-Recessed Nanoscale SOI MOSFETs

机译:栅极凹陷纳米型SOI MOSFET中电气特性和串联电阻的频道厚度影响

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摘要

Ultrathin body (UTB) and nanoscale body (NSB) SOI-MOSFET devices, sharing a similar W/L but with a channel thickness of 46 nm and lower than 5 nm, respectively, were fabricated using a selective “gate-recessed” process on the same silicon wafer. Their current-voltage characteristics measured at room temperature were found to be surprisingly different by several orders of magnitude. We analyzed this result by considering the severe mobility degradation and the influence of a huge series resistance and found that the last one seems more coherent. Then the electrical characteristics of the NSB can be analytically derived by integrating a gate voltage-dependent drain source series resistance. In this paper, the influence of the channel thickness on the series resistance is reported for the first time. This influence is integrated to the analytical model in order to describe the trends of the saturation current with the channel thickness. This modeling approach may be useful to interpret anomalous electrical behavior of other nanodevices in which series resistance and/or mobility degradation is of a great concern.
机译:使用选择性“门嵌入式”工艺,制造超薄体(UTB)和纳米体(NSB)SOI-MOSFET器件,分别与相似的W / L,但具有46nm的通道厚度和低于5nm,相同的硅晶片。在室温下测量的电流电压特性被几个数量级令人惊讶的不同。我们通过考虑严重的流动性劣化和巨大系列抗性的影响,发现了这一结果,发现最后一个似乎更加连贯了。然后,通过积分栅极电压依赖性漏极源串联电阻,可以分析NSB的电特性。本文首次报道了沟道厚度对串联电阻的影响。这种影响被集成到分析模型,以描述具有通道厚度的饱和电流的趋势。该建模方法可用于解释其他纳米型图的异常电气行为,其中串联电阻和/或迁移率降低具有很大的关注。

著录项

  • 作者

    A. Karsenty; A. Chelly;

  • 作者单位
  • 年度 2013
  • 总页数
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
  • 入库时间 2022-08-20 22:07:30

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