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Analysis of size quantization and temperature effects on the threshold voltage of thin silicon film double-gate metal-oxide-semiconductor field-effect transistor (MOSFET)

机译:尺寸量化和温度对薄膜双栅极金属氧化物半导体场效应晶体管(MOSFET)阈值电压的影响分析

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摘要

In this paper, we analyze the combined effects of size quantization and device temperature variations (T = 50K to 400 K) on the intrinsic carrier concentration (n_i), electron concentration (n) and thereby on the threshold voltage (V_th) for thin silicon film (t_si=1nm to 10nm) based fully-depleted Double-Gate Silicon-on-Insulator MOSFETs. The threshold voltage {V_th) is defined as the gate voltage (V_g) at which the potential at the center of the channel (Φ_c) begins to saturate (Φ_c = Φ_(c(sat))). It is shown that in the strong quantum confinement regime (t_(si) ≤ 3nm), the effects of size quantization far over-ride the effects of temperature variations on the total change in band-gap (△E_(g(eff))), intrinsic carrier concentration (n_i), electron concentration (n), Φ_(c(sat)) and the threshold voltage (V_(th)). On the other hand, for t_(si) ≥ 4nm, it is shown that size quantization effects recede with increasing t_(si), while the effects of temperature variations become increasingly significant. Through detailed analysis, a physical model for the threshold voltage is presented both for the undoped and doped cases valid over a wide-range of device temperatures, silicon film thicknesses and substrate doping densities. Both in the undoped and doped cases, it is shown that the threshold voltage strongly depends on the channel charge density and that it is independent of incomplete ionization effects, at lower device temperatures. The results are compared with the published work available in literature, and it is shown that the present approach incorporates quantization and temperature effects over the entire temperature range. We also present an analytical model for V_(th) as a function of device temperature (T).
机译:在本文中,我们分析了尺寸量化和器件温度变化(T = 50K至400 K)对本征载流子浓度(n_i),电子浓度(n)以及由此对薄硅的阈值电压(V_th)的综合影响薄膜(t_si = 1nm至10nm)的全耗尽型双栅绝缘体上硅MOSFET。阈值电压(V_th)定义为栅极电压(V_g),在该电压处,通道中心(Φ_c)的电势开始饱和(Φ_c=Φ_(c(sat)))。结果表明,在强量子限制条件下(t_(si)≤3nm),尺寸量化的影响远远超过了温度变化对带隙总变化的影响(△E_(g(eff)) ),本征载流子浓度(n_i),电子浓度(n),Φ_(c(sat))和​​阈值电压(V_(th))。另一方面,对于t_(si)≥4nm,显示出随着t_(si)的增加,尺寸量化效应减弱,而温度变化的影响变得越来越明显。通过详细的分析,提出了针对未掺杂和掺杂情况的阈值电压的物理模型,这些情况在很大的器件温度,硅膜厚度和衬底掺杂密度范围内均有效。在未掺杂和掺杂的情况下,都表明阈值电压在很大程度上取决于沟道电荷密度,并且在较低的器件温度下与不完全的电离效应无关。将结果与文献中的已发表工作进行了比较,结果表明,本方法在整个温度范围内均包含了量化和温度效应。我们还提出了V_(th)作为器件温度(T)的函数的解析模型。

著录项

  • 来源
    《Journal of Applied Physics》 |2013年第1期|014507.1-014507.8|共8页
  • 作者单位

    Centre for NanoScience and Engineering, Department of Electrical Communication Engineering,Indian Institute of Science, Bangalore 560012, India;

    Centre for NanoScience and Engineering, Department of Electrical Communication Engineering,Indian Institute of Science, Bangalore 560012, India;

    Centre for NanoScience and Engineering, Department of Electrical Communication Engineering,Indian Institute of Science, Bangalore 560012, India;

  • 收录信息 美国《科学引文索引》(SCI);美国《工程索引》(EI);美国《生物学医学文摘》(MEDLINE);
  • 原文格式 PDF
  • 正文语种 eng
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