Growth parameter optimization and interface treatment for enhanced electron mobility in heavily strained GalnAs/AllnAs high electron mobility transistor structures

摘要

The optimization of heavily strained Ga_(0.25)In_(0.75)As/Al_(0.48)In_(0.52)As high electron mobility transistor structures is discussed in detail. The growth parameters and the channel layer interfaces were optimized in order to maximize the mobility of the two-dimensional electron gas. Structures composed of an 11 nm thick channel layer and a 4 nm thick spacer layer exhibited electron mobilities as high as 15100 cm~2/Vs and 70000 cm~2/Vs at 300 and 77 K, respectively, for channels including InAs strained layers. The sheet carrier density was kept above 2.5 × 10~(12)cm~(-2) throughout the entire study.