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Mechanism and enhancement of the near-threshold low OFF-state breakdown voltage in gallium nitride high electron mobility transistors

机译:氮化镓高电子迁移率晶体管中近阈值低截止态击穿电压的机理和增强

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We studied AlGaN/GaN high electron mobility transistors grown on a SiC substrate. They had a hard breakdown voltage V-BR = 70 V under a deep OFF-state with a much less and softer V-BR similar to 27 V for near-threshold OFF-state gate bias conditions. We established that the low, soft breakdown is due to space charge limited current (SCLC) from drain to source via the GaN buffer, which has deep traps. Previous works had established the presence of SCLC from bulk to gate and drain to gate. For the first time we establish drain to source SCLC. We achieved this by analyzing the I-DS-V-DS data extracted from the measured I-S-V-DS. We determined the following by numerical simulation: (a) the density and energy level of traps causing the observed SCLC; (b) the minimum trap density required to suppress the SCLC and raise the V-BR up to the avalanche limit for the whole OFF-state regime for devices with a channel length down to 0.15 mu m. (C) 2019 The Japan Society of Applied Physics
机译:我们研究了在SiC衬底上生长的AlGaN / GaN高电子迁移率晶体管。在深关断状态下,它们的硬击穿电压V-BR> = 70 V,在接近阈值关断状态的栅极偏置条件下,其V-BR值小得多且较软,类似于27V。我们确定了低的软击穿是由于通过深陷阱的GaN缓冲器从漏极到源极的空间电荷限制电流(SCLC)。先前的工作已经建立了从散装到浇口以及从排水到浇口的薄层色谱法。我们第一次建立源SCLC的漏极。我们通过分析从测量的I-S-V-DS中提取的I-DS-V-DS数据来实现这一目标。我们通过数值模拟确定以下内容:(a)导致观察到的SCLC的陷阱的密度和能级; (b)对于通道长度低至0.15μm的器件,在整个OFF状态下抑制SCLC并将V-BR升高至雪崩极限所需的最小阱密度。 (C)2019日本应用物理学会

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