Fabrication of 4H-SiC lateral double implanted MOSFET on an on-axis semi-insulating substrate without using epi-layer

摘要

4H-SiC lateral double implanted metal-oxide-semiconductor field effect transistors (LDIMOSFET) were fabricated on on-axis semi-insulating SiC substrates without using an epi-layer. The LDIMOSFET adopted a current path layer (CPL), which was formed by ion-implantation. The CPL works as a drift region between gate and drain. By using on-axis semi-insulating substrate and optimized CPL parameters, breakdown voltage (BV) of 1093V and specific on-resistance (R-on,R- sp) of 89.8 m Omega.cm(2) were obtained in devices with 20 mu m long CPL. Experimentally extracted field-effect channel mobility was 21.7 cm(2)V(-1)s(-1) and the figure-of-merit (BV2/R-on,R- sp) was 13.3MW/cm(2). (c) 2017 The Japan Society of Applied Physics