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Experimental insight into the temperature effects on DC and microwave characteristics for a GaAs pHEMT in multilayer 3-D MMIC technology

机译:对多层3-D MMIC技术在GaAs Phemt的DC和微波特性的实验性见解

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This paper is focused on studying the behavior of a GaAs pseudomorphic high electron mobility transistors (pHEMT) with respect to the temperature. The tested pHEMT is realized using the multilayer three-dimensional (3-D) monolithic microwave integrated circuit (MMIC) technology. The analysis is based on temperature-dependent on-wafer measurements carried out from 298 K to 373 K. The experiments consist of DC characteristics and scattering parameters in the broad frequency range from 45 MHz to 40 GHz. The effect of the temperature on the measured transistor performance is analyzed in detail and then, to gain a better insight and understanding of the device behavior, the achieved measurements are used for extraction and validation of a small-signal equivalent-circuit model for different temperature conditions. This study shows that, by heating the studied device, the observed performance variations depend remarkably on the selected bias condition. In particular, the output current and transconductance are degraded at higher gate-source voltage and improved as the transistor is driven towards the pinch-off. This is due to the counterbalancing of temperature-dependent effects contributing in opposite ways to the resultant behavior of the transistor. Therefore, depending on the given application, an appropriate selection of the bias and temperature conditions is essential to guarantee adequate transistor performance.
机译:本文专注于研究GaAs假形立体高电子迁移率晶体管(PHEMT)相对于温度的行为。使用多层三维(3-D)单片微波集成电路(MMIC)技术实现了测试的PHEMT。该分析基于从298k至373k执行的温度依赖性的晶圆测量。实验组成的DC特性和散射参数在45 MHz至40GHz的宽频量范围内。详细地分析了温度对测量晶体管性能的影响,然后为设备行为进行更好的见解和理解,实现的测量用于提取和验证不同温度的小信号等效电路模型使适应。该研究表明,通过加热研究的装置,观察到的性能变化显着取决于所选择的偏置条件。特别地,输出电流和跨导在较高的栅极 - 源电压下劣化,并且随着晶体管被驱动朝向夹紧而改善。这是由于依赖于温度依赖性效应的平衡,以相反的方式贡献晶体管的所得到的行为。 Therefore, depending on the given application, an appropriate selection of the bias and temperature conditions is essential to guarantee adequate transistor performance.

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