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Drain Current Collapse in 65 nm pMOS Transistors After Exposure to Grad Dose

机译:暴露于梯度剂量后65nm pMOS晶体管的漏极电流崩溃

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Total ionizing dose (TID) response of pMOS transistors featuring a commercial 65 nm CMOS technology was studied by X-ray irradiation up to 1 Grad, which emulated total dose target in the LHC upgrade. After irradiation, dramatic reduction of drain current was observed, the degradation level showed a strong dependency on gate width. At total doses higher than , the off-state leakage was heightened by more than one order of magnitude, which was attributed to the gate-induced drain leakage (GIDL) due to the positive charge trapping in STI and/or gate oxide. The subthreshold swing (SS) and the threshold voltage remained practical constant even at 1 Grad total dose. The degradation in the drain current can be partially explained by the radiation induced narrow channel effect due to the positive charge trapping in STI. However, from the comparison results under two bias conditions during irradiation, there must be other mechanisms contributing together. Damage of the gate oxide could be another mechanism contributing to the dramatic drain current reduction.
机译:通过高达1 Grad的X射线辐照研究了采用商业65 nm CMOS技术的pMOS晶体管的总电离剂量(TID)响应,它模拟了LHC升级中的总剂量目标。辐照后,观察到漏极电流显着降低,降解水平显示出对栅极宽度的强烈依赖性。在高于的总剂量下,截止态泄漏会增加一个数量级以上,这归因于由于STI和/或栅极氧化物中的正电荷俘获而导致的栅极感应的漏极泄漏(GIDL)。即使在1 Grad总剂量下,亚阈值摆幅(SS)和阈值电压仍保持实用恒定。漏极电流的下降可以部分归因于由于STI中的正电荷俘获引起的辐射诱导的窄沟道效应。但是,从照射过程中两个偏置条件下的比较结果来看,必须有其他机制共同起作用。栅极氧化物的损坏可能是导致漏极电流大幅降低的另一种机制。

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