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Evaluation of the bonded silicon on insulator (SOI) wafer and the characteristics of PIN photodiodes on the bonded SOI wafer

机译:评估绝缘体上键合硅(SOI)晶片和键合SOI晶片上PIN光电二极管的特性

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Electrical properties of the bonded silicon on insulator (SOI) wafer and characteristics of PIN photodiodes fabricated on the SOI layer were evaluated. A trap with deep energy level (about Ec-Et=0.55 eV) was observed in the SOI layer with 100 /spl mu/m- and 30 /spl mu/m-thickness using the deep level transient spectroscopy (DLTS) method. No trap was detected in the SOI layer with 10 /spl mu/m-thickness. This deep trap was not observed before the wafer bonding process and thus the trap is generated during the wafer bonding process. From primary mode lifetime (/spl tau//sub 1/) measurements, it is considered that the trap will works as the generation center or the recombination center. For PIN photodiodes on the SOI layer in which the trap was detected, the increases of dark current were observed. Spectral responses of photodiodes on the SOI layer were almost the same as that on the normal FZ-Si wafer. We fabricated PIN photodiodes with good spectral response.
机译:评估了绝缘体上键合硅(SOI)晶片的电性能以及在SOI层上制造的PIN光电二极管的特性。使用深层瞬态光谱法(DLTS)在SOI层中观察到一个深能级陷阱(约Ec-Et = 0.55 eV),其陷阱厚度为100 / spl mu / m-和30 / spl mu / m。在SOI层中没有检测到陷阱,其厚度为10 / spl mu / m。在晶片键合工艺之前未观察到该深陷阱,因此该陷阱在晶片键合工艺期间产生。从主模式寿命(/ splau // sub 1 /)测量,认为陷阱将用作生成中心或重组中心。对于其中检测到陷阱的SOI层上的PIN光电二极管,观察到暗电流的增加。 SOI层上光电二极管的光谱响应与普通FZ-Si晶片上的光谱响应几乎相同。我们制造了具有良好光谱响应的PIN光电二极管。

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