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Dual Material Double-Layer Gate Stack SON MOSFET: A Novel Architecture for Enhanced Analog Performance—Part I: Impact of Gate Metal Workfunction Engineering

机译:双材料双层栅极堆叠SON MOSFET:增强模拟性能的新型架构-第一部分:栅极金属功函数工程的影响

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摘要

In this paper, we present a simulation study, using ATLAS-2D, of analog circuit performance metrics for the dual-material gate (DMG) MOSFETs in Part I. Part II focuses on the impact of double-layer gate stack architecture on the analog performance and $f_{T}$—gain relationship of the silicon-on-nothing MOSFETs with and without DMG. The simulation results in Part I demonstrate that, out of the several combinations in DMG MOSFET design studied, the DMG device with an $L_{{ rm M}1}/L$ ratio of 1/2 amalgamates the advantages of using a high metal workfunction gate M1 and a low metal workfunction gate M2 in the most efficient manner. An increase in early voltage and a reduced output conductance from the DMG MOSFET design are the driving forces for the observed performance improvement.
机译:在本文中,我们在第一部分中使用ATLAS-2D对双材料栅极(DMG)MOSFET的模拟电路性能指标进行了仿真研究。第二部分着眼于双层栅极堆叠体系结构对模拟的影响具有和不具有DMG的无硅MOSFET的性能和$ f_ {T} $的增益关系。第一部分的仿真结果表明,在所研究的DMG MOSFET设计的几种组合中,$ L _ {{rm M} 1} / L $比为1/2的DMG器件融合了使用高金属的优点。功函数门M1和低金属功函数门M2以最有效的方式。 DMG MOSFET设计中早期电压的增加和输出电导的减小是观察到的性能改善的驱动力。

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