Effects of Device Structure and Back Biasing on HCI and NBTI in Silicon-on-Thin-BOX (SOTB) CMOSFET

摘要

The silicon-on-thin-buried-oxide (SOTB) CMOSFET is one of the strong candidates for further scaling because of its smallest $V_{rm th}$ variation and back-bias controllability. This study focuses on its reliability, i.e., the hot-carrier-injection (HCI) degradation for the n-channel MOS and the negative-bias temperature instability (NBTI) for p-channel MOS. A comparison of the SOTB CMOSFET with a conventional bulk CMOSFET showed that the SOTB structure, which has a low-dose channel without a halo implant, produces higher reliability. The impact of the wide-range back biasing in SOTB devices on reliability was determined, i.e., the back biasing changes the mechanism of the HCI degradation but does not affect the NBTI degradation.