机译:SOI-LDMOS晶体管的一种改进的准饱和和电荷模型
Dept. of Electr. Eng., IIT Madras, Chennai, India;
MOSFET; electric charge; elemental semiconductors; resistors; semiconductor device models; silicon; silicon-on-insulator; 2D SOI resistor; SOI-LDMOS transistor; Si; gate-voltage dependence; lateral double-diffused metal-oxide-semiconductor; nodal charge model; quasisaturation model; self-heating condition; silicon-on-insulator; velocity saturation; Data models; Integrated circuit modeling; Logic gates; Resistors; Semiconductor device modeling; Semiconductor process modeling; Transistors; Capacitances; charge partitioning; lateral double-diffused metal-oxide-semiconductor (LDMOS); lateral double-diffused metal???oxide???semiconductor (LDMOS); quasi-saturation; scalability; silicon-on-insulator (SOI) technology; transient model; transient model.;
机译:电荷分配对SOI-LDMOS晶体管IM3预测的影响
机译:SOI-LDMOS晶体管的建模,包括碰撞电离,骤回和自加热
机译:具有优化的部分n + sup>埋层的SOI-LDMOS晶体管,可提高功率放大器应用的性能
机译:包含准饱和效应的SOI-LDMOS的紧凑模型
机译:量化和控制半导体聚合物侧链和骨干顺序研究电荷运输,改善现场效应晶体管性能
机译:通过电荷转移掺杂和接触工程改进了与p型MoS2晶体管的接触
机译:高压SOI-LDMOS晶体管的建模,包括自加热