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Self-aligned SiGe-base heterojunction bipolar transistor by selective epitaxy emitter window (SEEW) technology

机译:通过选择性外延发射极窗口(SEEW)技术自对准SiGe基异质结双极晶体管

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摘要

In the device a SiGe epitaxial base is integrated in a structure which uses in situ doped epitaxial lateral overgrowth for the formation of the emitter window and the extrinsic base contact. Nearly ideal I-V characteristics have been achieved for a base width of 60 nm with an intrinsic base resistance of 4.6 k Omega / Square Operator and for emitter widths down to 0.4 mu m. A DC collector current enhancement factor of 3.1 was obtained relative to a Si homojunction transistor with a 1.25 times higher intrinsic base resistance. The breakdown voltage BV/sub CBO/ is identical for both Si and SiGe devices, even though the collector-base depletion region is partly overlapped with the reduced-bandgap SiGe strained layer. The lower BV/sub CEO/, measured for the SiGe-base transistor, is due to the higher current gain. Based on these results the fabrication of high-speed bipolar circuits that take advantage of SiGe-base bandgap engineering seems possible using selective epitaxy emitter window (SEEW) technology.
机译:在该器件中,将SiGe外延基极集成到一个结构中,该结构使用原位掺杂的外延侧向过生长来形成发射极窗口和非本征基极接触。对于60 nm的基极宽度和4.6 k Omega / Square Operator的本征基极电阻以及低至0.4μm的发射极宽度,已经实现了近乎理想的I-V特性。相对于具有1.25倍本征基极电阻的Si同质结晶体管,获得了3.1的DC集电极电流增强因子。即使集电极-基极耗尽区与带隙减小的SiGe应变层部分重叠,Si和SiGe器件的击穿电压BV / sub CBO /也相同。针对SiGe基晶体管测量的BV / sub CEO /较低,是由于电流增益较高。基于这些结果,利用选择性外延发射极窗口(SEEW)技术,似乎有可能利用SiGe基带隙工程技术制造高速双极电路。

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