Tetragonal Stack as High- Gate Dielectric for Si-Based MOS Devices

摘要

The combination of tetragonal $hbox{ZrO}_{2} (hbox{t-ZrO}_{2})$ and amorphous $hbox{Al}_{2}hbox{O}_{3}$ was explored as the gate dielectric for Si-based MOS devices. Because of the absence of a $ hbox{ZrSiO}_{4}$ and/or ZrSi interfacial layer, the thermally stable $hbox{t-ZrO}_{2}/hbox{Al}_{2}hbox{O}_{3}/hbox{Si}$ stack is more eligible than the $hbox{Al}_{2}hbox{O}_{3}/hbox{t-ZrO}_{2}/hbox{Si}$ stack for the gate dielectric since it demonstrates larger capacitance, smaller hysteresis, better frequency dispersion, lower leakage current, and more robust reliability. By employing additional $ hbox{NH}_{3}$ plasma nitridation to well passivate the grain boundaries of the $hbox{t-ZrO}_{2}$ film, without compromising its $kappa$-value, a greatly reduced leakage current of $hbox{2.9} times hbox{10}^{-8} hbox{A/cm}^{2}$ can be achieved at gate bias of flatband voltage $(V_{rm fb}) - $1 V with an effective oxide thickness of 1.64 nm, which paves a new way to develop a high-performance crystalline gate dielectric for advanced MOS devices.