The gate stack which possesses the gate electrode which is laid out on the deformation silicon MOS device null gate dielectric which possesses

摘要

A gate stack having a gate electrode disposed on the gate dielectric, and the first spacer 2 and the first spacer is formed on both sides of the gate stack, MOS devices has a source region adjacent to the first spacer I has a drain region adjacent to the second spacer, and a channel region disposed between the source region and the drain region and located under the gate stack. Furthermore, MOS devices according to the present invention includes oxide (BOX) buried region disposed between the source region and the drain region and located below the channel region. BOX region allows for the source and drain regions deeper so reduce the junction parasitic capacitance of the gate edge and the resistance of the transistor while preventing salicide spike defects are formed.