首页> 外文期刊>Electron Device Letters, IEEE >A Compact Analytical Threshold-Voltage Model for Surrounding-Gate MOSFETs With Interface Trapped Charges
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A Compact Analytical Threshold-Voltage Model for Surrounding-Gate MOSFETs With Interface Trapped Charges

机译:具有接口陷阱电荷的包围栅MOSFET的紧凑型分析阈值电压模型

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摘要

With the effects of equivalent oxide charges on flatband voltage, a compact analytical threshold-voltage model for surrounding-gate MOSFETs with interface trapped charges is developed based on the parabolic potential approach. The model shows how interface charge density, damaged zone, oxide thickness, and diameter of silicon body affect the threshold voltage. The model is verified by a 3-D device simulator and can be used to explore the hot-carrier-induced threshold-voltage behavior of surrounding-gate MOSFETs for its memory device application.
机译:借助等效氧化物电荷对平带电压的影响,基于抛物线势方法,开发了具有界面陷阱电荷的环绕栅MOSFET的紧凑分析阈值电压模型。该模型显示了界面电荷密度,受损区域,氧化物厚度和硅主体直径如何影响阈值电压。该模型已通过3-D器件仿真器进行了验证,可用于探索热栅极引起的围栅MOSFET的阈值电压行为,以用于其存储器件应用。

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